An amplifier includes a semiconductor substrate. A first conductive feature partially covers the bottom substrate surface to define a conductor-less region of the bottom substrate surface. A first current conducting terminal of a transistor is electrically coupled to the first conductive feature. Second and third conductive features may be coupled to other regions of the bottom substrate surface. A first filter circuit includes an inductor formed over a portion of the top substrate surface that is directly opposite the conductor-less region. The first filter circuit may be electrically coupled between a second current conducting terminal of the transistor and the second conductive feature. A second filter circuit may be electrically coupled between a control terminal of the transistor and the third conductive feature. Conductive leads may be coupled to the second and third conductive features, or the second and third conductive features may be coupled to a printed circuit board.

A Doherty amplifier circuit comprising: a splitter having: a splitter-input-terminal for receiving an input signal; a main-splitter-output-terminal; and a peaking-splitter-output-terminal; a main-power-amplifier having a main-power-input-terminal and a main-power-output-terminal, wherein; the main-power-input-terminal is connected to the main-splitter-output-terminal; and the main-power-output-terminal is configured to provide a main-power-amplifier-output-signal; a peaking-power-amplifier having a peaking-power-input-terminal and a peaking-power-output-terminal, wherein: the peaking-power-input-terminal is connected to the peaking-splitter-output-terminal; and the peaking-power-output-terminal is configured to provide a peaking-power-amplifier-output-signal. The splitter, the main-power-amplifier and the peaking-power-amplifier are provided by means of an integrated circuit.

A low-noise amplifier device includes an inductive input element, an amplifier circuit, an inductive output element and an inductive degeneration element. The amplifier device is formed in and on a semiconductor substrate. The semiconductor substrate supports metallization levels of a back end of line structure. The metal lines of the inductive input element, inductive output element and inductive degeneration element are formed within one or more of the metallization levels. The inductive input element has a spiral shape and the an amplifier circuit, an inductive output element and an inductive degeneration element are located within the spiral shape.

A low noise amplifier circuit includes a first amplifier including a first transistor and a second transistor that are cascode-connected to each other; a second amplifier including a third transistor and a fourth transistor that are cascode-connected to each other; a source terminal matcher connected to a source of the first transistor and a source of the third transistor; and an input matcher providing input that is impedance-matched by a first inductor and a second inductor to a gate of the first transistor and providing input which is impedance-matched by the first inductor to a gate of the third transistor. The circuit is able to operate in a dual-band and provide impedance matching, while being simpler than alternative circuits.

An amplifier circuit couples one or more selectable input ports to one or more selectable output ports. The circuit includes N input transistors and M output transistors. Each input transistor has its base coupled to a respective input port node, its emitter coupled to ground, and its collector connected to an intermediate node. Each output transistor has its base coupled to a bias node, its emitter connected to the intermediate node, and its collector coupled to a respective output port nodes. Each input transistor enables the respective input port node when its base is biased. Each output transistor enables the respective output port node when its bias node is asserted. The base of the input transistor for each enabled port is biased to provide a quiescent current I0*m/n through that input transistor, where m is the number of enabled output ports and n is the number of enabled input ports.

A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacitive (LC) resonant circuit to reduce the effects of gate capacitances of the first cascode transistor pair and the second cascode transistor pair. In some embodiments, the current-mode power amplifier may include a bias current controller. The bias current controller may adjust transistor bias currents based, at least in part, on an input signal received by the current-mode power amplifier.

Embodiments of RF amplifiers and packaged RF amplifier devices each include a transistor, an impedance matching circuit, and a video bandwidth circuit. The impedance matching circuit is coupled between the transistor and an RF I/O (e.g., an input or output lead). The video bandwidth circuit is coupled between a connection node of the impedance matching circuit and a ground reference node. The video bandwidth circuit includes a plurality of components, which includes an envelope inductor and an envelope capacitor coupled in series between the connection node and the ground reference node. The video bandwidth circuit further includes a first bypass capacitor coupled in parallel across one or more of the plurality of components of the video bandwidth circuit.

A low-noise amplifier (LNA), a folded low-noise amplifier (folded LNA) and an amplifier circuit module are provided. The LNA includes a plurality of radio frequency (RF) input stages, at least one bias transistor and at least one radio frequency (RF) output stage. The bias transistor is connected to the

RF input stages to provide a DC bias source to one of the RF input stages for isolating others of the RF input stages. The RF output stage is connected in parallel with the RF input stages, which share an adjustable input inductor.

A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacitive (LC) resonant circuit to reduce the effects of gate capacitances of the first cascode transistor pair and the second cascode transistor pair. In some embodiments, the current-mode power amplifier may include a bias current controller. The bias current controller may adjust transistor bias currents based, at least in part, on an input signal received by the current-mode power amplifier.

Embodiments of RF amplifiers and packaged RF amplifier devices each include a transistor, an impedance matching circuit, and a video bandwidth circuit. The impedance matching circuit is coupled between the transistor and an RF I/O (e.g., an input or output lead). The video bandwidth circuit is coupled between a connection node of the impedance matching circuit and a ground reference node. The video bandwidth circuit includes a plurality of components, which includes an envelope inductor and an envelope capacitor coupled in series between the connection node and the ground reference node. The video bandwidth circuit further includes a first bypass capacitor coupled in parallel across one or more of the plurality of components of the video bandwidth circuit.