H03F2200/225

Circuit with co-matching topology for transmitting and receiving RF signals
10715089 · 2020-07-14 · ·

A circuit with co-matching topology for transmitting and receiving RF signals for return loss improvement, wherein when transmitting RF signals, the LNA is turned off and the capacitance of an adjustable capacitive component is adjusted for transmitting RF signals, and when receiving RF signals, the power amplifier and the adjustable capacitive component are turned off, wherein a matching network is designed in favor of the LNA for receiving RF signals while the adjustable capacitive component can adjust the overall impedance of the circuit including the matching network that is also used when transmitting RF signals and the adjustable capacitive component for improving the transmitting return loss.

Wideband low noise amplifier (LNA) with a reconfigurable bandwidth for millimeter-wave 5G communication

According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.

Circuit with Co-Matching Topology for Transmitting and Receiving RF Signals
20200212852 · 2020-07-02 ·

A circuit with co-matching topology for transmitting and receiving RF signals for return loss improvement, wherein when transmitting RF signals, the LNA is turned off and the capacitance of an adjustable capacitive component is adjusted for transmitting RF signals, and when receiving RF signals, the power amplifier and the adjustable capacitive component are turned off, wherein a matching network is designed in favor of the LNA for receiving RF signals while the adjustable capacitive component can adjust the overall impedance of the circuit including the matching network that is also used when transmitting RF signals and the adjustable capacitive component for improving the transmitting return loss.

BROADBAND POWER TRANSISTOR DEVICES AND AMPLIFIERS WITH INPUT-SIDE HARMONIC TERMINATION CIRCUITS AND METHODS OF MANUFACTURE

Embodiments of RF amplifiers and RF amplifier devices include a transistor, a multiple-section bandpass filter circuit, and a harmonic termination circuit. The bandpass filter circuit includes a first connection node coupled to the amplifier input, a first inductive element coupled between the first connection node and a ground reference node, a first capacitance coupled between the first connection node and a second connection node, a second capacitance coupled between the second connection node and the ground reference node, and a second inductive element coupled between the second connection node and the transistor input. The harmonic termination circuit includes a third inductive element and a third capacitance connected in series between the transistor input and the ground reference node. The harmonic termination circuit resonates at a harmonic frequency of a fundamental frequency of operation of the RF amplifier.

RF Power Amplifiers with Diode Linearizer
20200195202 · 2020-06-18 ·

A radio frequency (RF) power amplifier circuit with a diode linearizer circuit. The power amplifier circuit has an input and an output, as well as a power amplifier transistor with a first terminal connected to the input, a second terminal connected to the output, and a third terminal. The linearizer circuit is connected to the third terminal and to ground, and has a non-linear current-voltage curve as well as a non-linear capacitance. The linearizer circuit reduces inter-modulation products in a current through the power amplifier transistor from the second terminal to the third terminal that corresponds to an input signal applied to the input.

Packaged RF power amplifier having a high power density

A packaged RF power amplifier comprises an output network coupled to the output of a RF power transistor, which output network comprises a plurality of first bondwires extending along a first direction between the output of transistor and an output lead of the package, a series connection of a second inductor and a first capacitor between the output of the RF power transistor and ground, and a series connection of a third inductor and a second capacitor connected in between ground and the junction between the second inductor and the first capacitor. The first and second capacitors are integrated on a single passive die and the third inductor comprises a first part and a second part connected in series, wherein the first part extends at least partially along the first direction, and wherein the second part extends at least partially in a direction opposite to the first direction.

Power amplifier module

A power amplifier module includes an amplifier that amplifies an input signal and outputs the amplified signal, a harmonic termination circuit that is disposed subsequent to the amplifier and that attenuates a harmonic component of the amplified signal, the harmonic termination circuit including at least one field effect transistor (FET), and a control circuit that controls a gate voltage of the at least one FET to adjust a capacitance value of a parasitic capacitance of the at least one FET. The control circuit adjusts the capacitance value of the parasitic capacitance of the at least one FET, and thereby a resonance frequency of the harmonic termination circuit is adjusted.

CIRCUIT STRUCTURE AND METHOD FOR IMPROVING HARMONIC SUPPRESSION CAPABILITY OF RADIO FREQUENCY POWER AMPLIFIER

A circuit structure for improving the harmonic suppression capability of a radio frequency power amplifier includes an output stage unit, a high-order harmonic suppression unit, and a low-order harmonic suppression unit. The output stage unit outputs a signal to be subjected to harmonic suppression; the high-order harmonic suppression unit comprises a first filter capacitor and a back hole, and is used for suppressing fifth or higher harmonics; the output stage unit and the first filter capacitor are connected to the ground in series by means of the back hole; the low-order harmonic suppression unit is connected to the output stage unit to suppress second, third and fourth harmonics. According to the design, the high-harmonic suppression capability of the radio frequency power amplifier is improved.

Common base pre-amplifier

In some embodiments, a power amplification system can include a common base amplifier configured to amplify an input signal received at an input node to generate an intermediate signal at an intermediate node. The power amplification system can further include a power amplifier configured to amplify the intermediate signal received at the intermediate node to generate an output signal at an output node.

RF amplifier package with biasing strip
10651168 · 2020-05-12 · ·

Embodiments of an RF amplifier package include a body section comprising an upper surface having first and second opposing edge sides, and a die pad vertically recessed beneath the upper surface and comprising first and second opposing sides and a third side intersecting with the first and second sides. Embodiments also include first and second leads disposed on the upper surface, the second lead extending from adjacent to the second side to the second edge side; and a biasing strip connected to the second lead and disposed on the upper surface adjacent to the third side. Other embodiments include packaged RF amplifiers comprising an RF amplifier package, and an RF transistor mounted on the die pad and comprising: a control terminal electrically coupled to the first lead, a reference potential terminal directly facing and electrically connected to the die pad, and an output terminal electrically connected to the second lead.