A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

An amplifier includes a semiconductor substrate. A first conductive feature partially covers the bottom substrate surface to define a conductor-less region of the bottom substrate surface. A first current conducting terminal of a transistor is electrically coupled to the first conductive feature. Second and third conductive features may be coupled to other regions of the bottom substrate surface. A first filter circuit includes an inductor formed over a portion of the top substrate surface that is directly opposite the conductor-less region. The first filter circuit may be electrically coupled between a second current conducting terminal of the transistor and the second conductive feature. A second filter circuit may be electrically coupled between a control terminal of the transistor and the third conductive feature. Conductive leads may be coupled to the second and third conductive features, or the second and third conductive features may be coupled to a printed circuit board.

Methods and devices used in mobile receiver front end to support multiple paths and multiple frequency bands are described. The presented devices and methods provide benefits of scalability, frequency band agility, as well as size reduction by using one low noise amplifier per simultaneous outputs. Based on the disclosed teachings, variable gain amplification of multiband signals is also presented.

A radio frequency (RF) power amplifier circuit with a diode linearizer circuit. The power amplifier circuit has an input and an output, as well as a power amplifier transistor with a first terminal connected to the input, a second terminal connected to the output, and a third terminal. The linearizer circuit is connected to the third terminal and to ground, and has a non-linear current-voltage curve as well as a non-linear capacitance. The linearizer circuit reduces inter-modulation products in a current through the power amplifier transistor from the second terminal to the third terminal that corresponds to an input signal applied to the input.

A power amplifier device includes a first amplifier, a second amplifier, a capacitor, a node, and an impedance matching circuit. The second amplifier amplifies a radio frequency signal transmitted from the first amplifier. The capacitor is coupled between an output terminal of the first amplifier and an input terminal of the second amplifier. The node is disposed between the input terminal of the second amplifier and the capacitor. The impedance matching circuit is coupled to the node and a common voltage terminal. The impedance matching circuit is substantially an open circuit at a center frequency of the radio frequency signal. The impedance matching circuit provides substantially a short-circuited path from the node to the common voltage terminal at a frequency twice the center frequency.

The embodiments described herein provide radio frequency (RF) amplifiers, and in some embodiments provide amplifiers that can be used in high power RF applications. Specifically, the amplifiers described herein may be implemented to include one or more matching networks with the transistor(s) and inside the device package in a way that may facilitate operation at high frequencies and over wide bandwidths. Specifically, the amplifiers can be implemented with matching networks that include inductive and capacitive elements arranged in double T-match configuration, where at least some inductive elements are implemented with bond wires and the capacitive elements are implemented with integrated passive devices (IPDs). In such implementations the double T-match configuration of the matching network can be fully implemented inside the package, and may provide the amplifier with high frequency, wide bandwidth performance.

Embodiments of RF amplifiers and packaged RF amplifier devices each include a transistor with a drain-source capacitance that is relatively low, an input impedance matching circuit, and an input-side harmonic termination circuit. The input impedance matching circuit includes a harmonic termination circuit, which in turn includes a first inductance (a first plurality of bondwires) and a first capacitance coupled in series between the transistor output and a ground reference node. The input impedance matching circuit also includes a second inductance (a second plurality of bondwires), a third inductance (a third plurality of bondwires), and a second capacitance coupled in a T-match configuration between the input lead and the transistor input. The first and second capacitances may be metal-insulator-metal capacitors in an integrated passive device.

Front-end for processing 2G signal using 3G/4G paths. In some embodiments, a front-end architecture can include a first amplification path and a second amplification path, with each being configured to amplify a 3G/4G signal, and the first amplification path including a phase shifting circuit. The front-end architecture can further include a splitter configured to receive a 2G signal and split the 2G signal into the first and second amplification paths, and a combiner configured to combine amplified 2G signals from the first and second amplification paths into a common output path. The front-end architecture can further include an impedance transformer implemented along the common output path to provide a desired impedance for the combined 2G signal.

A Doherty amplifier includes first and second input terminals, first and second amplifiers, and an output combiner circuit. The first amplifier includes a first amplifier input coupled to the first input terminal, and a first amplifier output. The second amplifier includes a second amplifier input coupled to the second input terminal, and a second amplifier output. The output combiner circuit is coupled between the first amplifier output, the second amplifier output, and a final summing node. The output combiner circuit includes a first inductive element, a first capacitor integrated within an integrated passive device (IPD), and a second inductive element. The first inductive element is coupled between the first amplifier output and a first terminal of the first capacitor, and the second inductive element is coupled between a combining node and the first terminal of the first capacitor. A second terminal of the first capacitor is coupled to ground.

According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.