An amplifying circuit including a first gain circuit, a second gain circuit, a Miller capacitor, a positive feedback circuit and a feedforward gain circuit. The second gain circuit is configured to receive a first gain signal from the first gain circuit and generate a second gain signal. The Miller capacitor, the positive feedback circuit and the feedforward gain circuit are electrically coupled between an input terminal and an output terminal of the second gain circuit. The positive feedback circuit is configured to feedback the signal of the output terminal of the second gain circuit to the input terminal of the second gain circuit. The feedforward gain circuit is configured to amplify the first gain signal to output a third gain signal to the output terminal of the second gain circuit.

A trans-impedance amplifier (TIA) includes a first circuit, a second circuit, and a third circuit. Both the first circuit and the second circuit are coupled to a current source, an operational amplifier, and the third circuit. The first circuit is configured to receive a first current, provide a third voltage to the third circuit, perform shape filtering on the first current, and convert the shape filtered first current to a first voltage for output. The second circuit is configured to receive a second current, provide a fourth voltage to the third circuit, perform shape filtering on the second current, and convert the shape filtered second current to a second voltage for output. The third circuit is configured to cooperate with the first circuit and the second circuit in performing shape filtering. The operational amplifier is configured to provide a small-signal virtual ground point to the first circuit.

A device includes an amplifier having inverting and non-inverting inputs and an output. The device includes a capacitor coupled to a first node and to ground, a resistor coupled to the first node and the amplifier output, and a first switch coupled to the first node and a current sink, which is coupled to ground. The device includes AND gate having inputs and an output coupled to control terminal of first switch. The device includes a first comparator having non-inverting and inverting inputs and an output coupled to an AND gate input; a second comparator having a non-inverting input coupled to the amplifier output, an inverting input coupled to a transistor stack, and an output coupled to an AND gate input; and a second switch coupled to the transistor stack and to a current source, the second switch having a control terminal coupled to the first comparator output.

Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

A digitally controlled grounded capacitor multiplier includes: a single capacitor directly connected at one end to an input voltage and at another end to a negative input of an operational amplifier; the operational amplifier including a negative feedback loop; and a digitally controlled current amplifier (DCCA) connected to an output of the operational amplifier. The DCCA digitally controls the digitally controlled grounded capacitor multiplier. The digitally controlled grounded capacitor multiplier comprises only two active devices consisting of the operational amplifier and the DCCA.

Apparatus and methods remove a voltage offset from an electrical signal, specifically a biomedical signal. A signal is received at a first operational amplifier and is amplified by a gain. An amplitude of the signal is monitored, by a first pair of diode stages coupled to an output of the first operational amplifier, for the voltage offset. The amplitude of the signal is then attenuated by the first pair of diode stages and a plurality of timing banks. The attenuating includes limiting charging, by the first pair of diode stages, of the plurality of timing banks and setting a time constant based on the charging. The attenuating removes the voltage offset persisting at a threshold for a duration of at least the time constant. Saturation of the signal is limited to a saturation recovery time while the saturated signal is gradually pulled into monitoring range over the saturation recovery time.

Systems, methods, and computer program product embodiments are disclosed for performing electrophysiology (EP) signal processing. An embodiment includes an electrocardiogram (ECG) circuit board configured to process an ECG signal. The embodiment further includes a plurality of intracardiac (IC) circuit boards, each configured to process a corresponding IC signal. The ECG circuit board and the plurality of IC circuit boards share substantially a same circuit configuration and components. The ECG circuit board further processes the ECG signal using substantially a same path as each IC circuit board uses to process its corresponding IC signal.

A digitally controlled grounded capacitor multiplier includes: a single capacitor directly connected at one end to an input voltage and at another end to a negative input of an operational amplifier; the operational amplifier including a negative feedback loop; and a digitally controlled current amplifier (DCCA) connected to an output of the operational amplifier. The DCCA digitally controls the digitally controlled grounded capacitor multiplier. The digitally controlled grounded capacitor multiplier comprises only two active devices consisting of the operational amplifier and the DCCA.

An amplifying circuit including a first gain circuit, a second gain circuit, a Miller capacitor, a positive feedback circuit and a feedforward gain circuit. The second gain circuit is configured to receive a first gain signal from the first gain circuit and generate a second gain signal. The Miller capacitor, the positive feedback circuit and the feedforward gain circuit are electrically coupled between an input terminal and an output terminal of the second gain circuit. The positive feedback circuit is configured to feedback the signal of the output terminal of the second gain circuit to the input terminal of the second gain circuit. The feedforward gain circuit is configured to amplify the first gain signal to output a third gain signal to the output terminal of the second gain circuit.

An offset-cancellation circuit having a first amplification stage with a gain of the first amplification stage and configured to receive an offset voltage of a first amplifier. A storage element is configured to be coupled to and decoupled from the first amplification stage and configured to store a potential difference output by the first amplification stage. The potential difference is determined by the offset voltage of the first amplifier and the gain of the first amplification stage. A second amplification stage is coupled to the storage element and configured to receive the potential difference from the storage element when the storage element is decoupled from the first amplification stage and configured to deliver an offset-cancellation current. The offset-cancellation current is determined by the potential difference and a gain of the second amplification stage.