A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source input stage and a common gate output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source input stage and a common gate output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

A circuit includes an active balun having an RF signal input and having differential signal outputs, the active balun including a first pair of transistors coupled to the RF signal input, the first pair of transistors including a first transistor of a first type and a second transistor of a second type, wherein the first type and second type are complementary; and an intermodulation distortion (IMD) sink circuit having an operational amplifier (op amp) coupled between a first node and a second node, wherein the first transistor and second transistor are coupled in series between the first node and the second node.

An integrated circuit arrangement for a microphone, a microphone system and a method for adjusting circuit parameters of the microphone are disclosed. In an embodiment an integrated circuit includes an amplifier circuit with a first switchable network circuit for adjusting an amplifier current of the amplifier circuit, the first switchable network circuit comprising a plurality of switches (SW1, . . . ,SWx) each coupled with a first control port of the first switchable network circuit and a control unit coupled with the first control port of the first switchable network circuit and configured to control a setting of the respective switches (SW1, . . . ,SWx) of the first switchable network circuit.

This application relates to methods and apparatus for multichannel drivers for driving transducers in different channels. A multichannel driver has a plurality of output stages configured such that two output nodes can be modulated between selected switching voltages with a controlled duty cycle to generate a differential output signal across a respective transducer, each output stage being operable with different switching voltages in different modes of operation. A first set of two or more of the output stages are arranged to receive a voltage output by a capacitive voltage generator to use as a switching voltage. A controller is configured to control the mode of operation and duty-cycle of each of the output stages based on a respective input signal and also based on operation of the other output stages of the first set.

A feedback gate bias circuit for use in radio frequency amplifiers to more effectively control operation of LDFET, GaNFET, GaAsFET, and JFET type transistors used in such circuits. A transistor gate bias circuit that senses drain current and automatically adjusts or biases the gate voltage to maintain drain current independently of temperature, time, input drive, frequency, as well as from device to device variations. Additional circuits to provide temperature compensation, RF power monitoring and drain current control, RF output power leveler, high power gain block, and optional digital control of various functions. A gate bias circuit including a bias sequencer and negative voltage deriver for operation of N-channel depletion mode devices.

This application relates to amplifier circuitry for amplifying a signal from a MEMS transducer. A super source follower circuit (40) is provided which includes a feedback path from its output node (N.sub.out) to a control bias node (BC) in order to provide a preamplifier signal gain that may be greater than unity. A first transistor (M1) is configured to have its gate node connected to an input node (N.sub.IN) for receiving the input signal (V.sub.IN) and its drain node connected to an input node (X) of an output stage (A). The source node of the first transistor is connected to the output node (N.sub.OUT). A current source (I2) is configured to deliver a current to the drain node of the first transistor (M1), wherein the current source (I2) is controlled by a bias control voltage (V.sub.BC) at the bias control node (BC). A feedback impedance network (Z1) comprising a first port connected to the output node (N.sub.OUT) and a second port connected to the bias control node (BC) is provided.

An RF amplifier module that has a plurality of amplifiers wherein at least one of the amplifiers is powered via an envelope tracking module. The biasing input of at least one of the amplifiers is provided to the first amplifier to power the first amplifier to reduce power consumption. The first amplifier may also be powered via fixed biasing to provide greater stability of the module.

A circuit includes a bias circuit for a biased transistor. The bias circuit includes a master-slave source follower circuit, a reference transistor, and a bias circuit voltage output coupled to the biased transistor and configured to provide a bias voltage. The reference transistor has a transconductance substantially identical to a transconductance of the biased transistor. A signal ground circuit may be coupled between the biased transistor and one or more components of the bias circuit that do not generate significant return currents to a power supply ground. A method includes generating a current in a reference transistor according to a first voltage generated using a master source follower circuit, generating a second voltage substantially identical to the first voltage using a slave source follower circuit, and providing the second voltage to a biased transistor. The reference transistor has a transconductance substantially identical to a transconductance of the biased transistor.

An amplifier includes a differential amplifier and a compensator. A differential amplifier includes a current source and paired transistors. The paired transistors generate an output signal by dividing a source current supplied by the current source into emitter currents of the paired transistors in response to a difference between an input signal and a reference signal. A compensator includes an amplifying transistor and a feedback circuit that feeds a collector current output from a collector of the amplifying transistor back to a base of the amplifying transistor therethrough. The compensator generates the reference signal at a base of the amplifying transistor. The compensator decreases power consumption of the amplifying transistor when the collector current increases, and increases the power consumption of the amplifying transistor when the collector current decreases. The compensator suppresses a peaking of gain in a low frequency band.