An envelope stacking power amplifier system reduces current for a given output power level without sacrificing the ability to support large voltage swings at saturation and therefore increases efficiency at the maximum linear operating power and all power levels below that. The system includes a stack/unstack controller including circuitry configured to switch the RF power amplifier system between a stacked mode in which first and second RF amplifiers are coupled in a stacked configuration and an unstacked mode in which the first and second RF amplifiers are coupled in an unstacked configuration in response to one or more mode-control signals, the stacked configuration providing reduced current compared to the unstacked configuration.

A semiconductor devices comprises a first member including a first circuit partially formed by an elemental semiconductor element at a surface layer, a first conductive raised portion at the first member, and a second member smaller than the first member in plan view joined to the first member. The second member includes a second circuit partially formed by a compound semiconductor element. A second conductive raised portion is at the second member. A power amplifier includes a first-stage amplifier circuit included in the first or second circuit and a second-stage amplifier circuit included in the second circuit. The first circuit includes a first switch for inputting to the first-stage amplifier circuit a radio-frequency signal inputted to a selected contact, a control circuit to control the first- and second-stage amplifier circuits, and a second switch for outputting from a selected contact a radio-frequency signal outputted by the second-stage amplifier circuit.

A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.

Chopper amplifiers with tracking of multiple input offsets are disclosed herein. In certain embodiments, a chopper amplifier includes chopper amplifier circuitry including an input chopping circuit, an amplification circuit, and an output chopping circuit electrically connected along a signal path. The amplification circuit includes two or more pairs of input transistors, from which a control circuit chooses a selected pair of input transistors to amplify an input signal. The chopper amplifier further incudes an offset correction circuit that senses the signal path to generate an input offset compensation signal for the amplification circuit. Furthermore, the offset correction circuit separately tracks an input offset of each of the two or more pairs of input transistors.

A power amplifier provides reduction of click and pop in audio applications. The power amplifier includes a first amplifier and an auxiliary amplifier. The auxiliary amplifier is used to ramp the power amplifier output from ground to an offset voltage to reduce the “click and pop” sound. The first amplifier and the auxiliary amplifier having a shared feedback loop. An output of the first amplifier and an output of the auxiliary amplifier may be switchably coupled to the shared feedback loop. A wave generator controls a switch to couple the first amplifier output or the auxiliary amplifier output to the shared feedback loop.

An envelope stacking power amplifier system reduces current for a given output power level without sacrificing the ability to support large voltage swings at saturation and therefore increases efficiency at the maximum linear operating power and all power levels below that. The system includes a stack/unstack controller including circuitry configured to switch the RF power amplifier system between a stacked mode in which first and second RF amplifiers are coupled in a stacked configuration and an unstacked mode in which the first and second RF amplifiers are coupled in an unstacked configuration in response to one or more mode-control signals, the stacked configuration providing reduced current compared to the unstacked configuration.

Provided are embodiments that include a circuit configured to operate in a disabled mode error reduction for high-voltage bilateral operational amplifier current source. The circuit includes an operational amplifier, and a switching circuit coupled to the operation amplifier, wherein the switching circuit is operable in a normal mode and a disabled mode, wherein the disabled mode reduces error current at the output of the operational amplifier. Also provided are embodiments for a method for operating a circuit in a disabled mode for error reduction.

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

In an embodiment an integration circuit has a first input terminal configured to receive a first input signal, a second input terminal configured to receive a second input signal, an output terminal to provide an output signal as a function of the first and the second input signal, a first and a second amplifier, each being switchably connected between the first or the second input terminal and the output terminal, and a capacitor which is switchably coupled in a feedback loop either of the first or of the second amplifier such that the capacitor and one of the first and the second amplifier form an inverting integrator providing the output signal. Therein the integration circuit is prepared to be operated in a first and a second subphase, wherein in each of first and second subphases one of the first and the second input signals is supplied to the inverting integrator and the respective other one of first and the second input signals is supplied to the respective other one of the first and the second amplifier.

An envelope stacking power amplifier system reduces current for a given output power level without sacrificing the ability to support large voltage swings at saturation and therefore increases efficiency at the maximum linear operating power and all power levels below that. The system includes a stack/unstack controller including circuitry configured to switch the RF power amplifier system between a stacked mode in which first and second RF amplifiers are coupled in a stacked configuration and an unstacked mode in which the first and second RF amplifiers are coupled in an unstacked configuration in response to one or more mode-control signals, the stacked configuration providing reduced current compared to the unstacked configuration.