H03F2200/258

Bias circuitry for depletion mode amplifiers

A circuit having an amplifier, comprising: a depletion mode transistor having a source electrode coupled to a reference potential; a drain electrode coupled to a potential more positive than the reference potential; and a gate electrode for coupling to an input signal. The circuit includes a bias circuit, comprising: a current source; and biasing circuitry coupled to the current source and between the potential more positive than the reference potential and a potential more negative than the reference potential. A control circuit is connected to the current source for controlling the amount of current produced by the current source to the biasing circuitry.

Transmission apparatus, transmission system and data detection method
10268227 · 2019-04-23 · ·

A transmission apparatus including: a branch circuit that branches a signal including first data and second data superimposed on the first data into two signals; a limiting amplifier that amplifies one signal in the two signals; a linear amplifier that amplifies another signal in the two signals; a first detector that detects the first data from the amplified one signal; and a second detector that detects the second data from the amplified another signal and the amplified one signal.

BIAS BOOSTING CIRCUIT FOR AMPLIFIER

An amplification system can include a bias booster circuit and an amplifier that amplifies an input signal to drive a load. The bias boosting circuit can include a negative bias booster that applies a charge to an input node of the amplifier in response to a negative half-cycle of the input signal that exceeds a boost threshold level. The bias boosting circuit can also include a positive bias booster that discharges the input node of the amplifier during a positive half-cycle of the input signal that exceeds the boost threshold level. The discharging by the positive bias booster is slower than the charging by the negative bias booster to induce a bias voltage increase from a quiescent bias voltage on the input node of the amplifier.

Methods of adjusting gain error in instrumentation amplifiers

A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

Amplifier circuit with an output limiter

An amplifier circuit comprising: an amplifier; an output limiter for providing a variable impedance comprising: a first and second limiter terminal; a transistor comprising a conduction channel; a first resistor coupled in parallel with the conduction channel; and a capacitor coupled in series with the conduction channel between the conduction channel and the first or second limiter terminal; and a feedback control unit comprising a comparator block configured to provide a control signal to the output limiter based on a comparison of the amplifier output signal and a setting voltage; wherein: the first limiter terminal is coupled to the amplifier input or output; the second limiter terminal receives a reference voltage; and wherein receipt of the control signal at the transistor provides for a variable impedance for the amplifier circuit dependent on the amplifier output signal.

Methods of adjusting gain error in instrumentation amplifiers

A current feed-back instrumentation amplifier (CFIA) comprises a differential pair with degeneration for amplifying small differential voltages in the presence of large common-mode voltages. The CFIA includes input and feedback transconductors and a trimming circuit that trims the back-bias voltages of the transistors in each transconductor. The trimming circuit includes a plurality of selectable resistors disposed in the signal path of the tail current in each transconductor. Each of the plurality of selectable resistors has a switch coupled to it. When a switch is closed, only the resistors up to the respective switch are in the signal path of the bulk-to-source voltage of the differentially paired transistors. The resistor trimming circuit reduces the mismatch between transconductances of the respective differential pair transistors, in turn reducing mismatch of the overall transconductances of the transconductors, and thereby reducing the CFIA's gain error.

HIGH-EFFICIENCY AMPLIFIER
20180316326 · 2018-11-01 ·

There is provided an electronic amplification apparatus (40) comprising a travelling wave tube amplifier (20) and a limiter (10), wherein the configuration of the amplifier (20) is optimised whilst maintaining signal linearity for operation with improved DC power efficiency at an operating point below saturation, and the limiter (10) is arranged to prevent the output power of the amplifier from going beyond a predetermined limit. This can prevent possible damage. There is also provided a multiport amplifier system (50) containing the electronic amplification apparatus (40), and a multi-feed, multi-amplifier phased array type antenna system (130) containing the electronic amplification apparatus (40), and a satellite communications system comprising the electronic amplification apparatus (40) or the multiport amplifier system (50) or the multi-feed, multi-amplifier phased array type antenna system (130).

BOOSTED AMPLIFIER WITH CURRENT LIMITING

A boosted amplifier system may include a boost stage configured to boost an input voltage of the boost stage to an output voltage greater than the input voltage and an amplifier stage powered by the output voltage of the charge pump and configured to amplify an input signal to generate an output signal. The boost stage may have input current limiting circuitry for ensuring that an input current of the boost stage is maintained below a current limit and the amplifier stage may have an input for receiving an indication of whether the current-limiting circuitry of the boost stage is activated to maintain the input current of the boost stage below the current limit.

Amplifier system, controller of main amplifier and associated control method
10027300 · 2018-07-17 · ·

The present invention provides a control circuit to stabilize an output power of a power amplifier. The control circuit comprises a voltage clamping loop, a current clamping loop and a loop for reducing power variation under VSWR, where the voltage clamping loop is used to clamp an output voltage of the power amplifier within a defined voltage range, the current clamping loop is used to clamp a current of the power amplifier within a defined current range, and the loop for reducing power variation under VSWR is implemented by an impedance detector to compensate the output power under VSWR variation.

Bias Circuitry For Depletion Mode Amplifiers

A circuit having an amplifier, comprising: a depletion mode transistor having a source electrode coupled to a reference potential; a drain electrode coupled to a potential more positive than the reference potential; and a gate electrode for coupling to an input signal. The circuit includes a bias circuit, comprising: a current source; and biasing circuitry coupled to the current source and between the potential more positive than the reference potential and a potential more negative than the reference potential. A control circuit is connected to the current source for controlling the amount of current produced by the current source to the biasing circuitry.