Methods and devices for reducing gate node instability of a differential cascode amplifier are presented. Ground return loops, and therefore corresponding parasitic inductances, are eliminated by using voltage symmetry at nodes of two cascode amplification legs of the differential cascode amplifier. Series connected capacitors are coupled between gate nodes of pairs of cascode amplifiers of the two cascode amplification legs so to create a common node connecting the two capacitors. In order to reduce peak to peak voltage variation at the common node under large signal conditions, a shunting capacitor is connected to the common node.

Provided are an interstage matching circuit and a push-pull power amplifier circuit. The push-pull power amplifier circuit comprises a pre-stage push-pull amplifier circuit and a post-stage push-pull amplifier circuit. The interstage matching circuit comprises a first matching capacitor connected in series between the pre-stage push-pull amplifier circuit and the post-stage push-pull amplifier circuit; and a second matching capacitor connected in series between the pre-stage push-pull amplifier circuit and the post-stage push-pull amplifier circuit; a first matching inductor is connected with a connection node between the pre-stage push-pull amplifier circuit and the first matching capacitor, the first matching inductor is connected with a second matching inductor, the second matching inductor is connected with a connection node between the pre-stage push-pull amplifier circuit and the second matching capacitor, and a connection node between the first matching inductor and the second matching inductor is used for connecting with a feed power supply.

An amplifier includes: a high-frequency input terminal; a high-frequency output terminal; a multistage circuit provided between the high-frequency input terminal and the high-frequency output terminal and including two or more amplifiers and connected in series, each amplifier including an input matching circuit, a transistor, and an output matching circuit; a stabilizing circuit provided in at least two of the amplifiers and including a bandpass filter and a resistor connected in parallel; and a band-rejection filter provided between the at least two of amplifiers and eliminating a frequency lower than an operation frequency of the amplifier. The stabilizing circuit and the band-rejection filter are provided between an output terminal of the transistor of the amplifier and the output matching circuit or provided in the output matching circuit. The closer to the high-frequency input terminal the bandpass filter is, the lower a resonance frequency of the bandpass filter is.

A notch circuit and a power amplifier module capable of reducing self-interference in a transceiver are provided. The transceiver includes a transmitter and a receiver, and the transmitter causes self-interference to the receiver. The transmitter includes a power amplifier module and the power amplifier module includes a notch circuit and a power amplifier. The notch circuit includes an inductor and a capacitor. The power amplifier amplifies an input transmission signal to generate an output transmission signal. The inductor receives a supply voltage. An amplitude of the supply voltage varies with the first input transmission signal. The capacitor is electrically connected to the inductor. The first output transmission signal (Tx_out1) is attenuated when a modulated frequency of the supply voltage is corresponding to a stopband.

A circuit device includes an analog front-end circuit that receives a target signal is input, and a processing circuit that performs arithmetic processing based on an output signal from the analog front-end circuit. The analog front-end circuit includes a plurality of comparator circuits that compare the voltage level of the target signal to a plurality of threshold voltages and output a plurality of comparison result signals. The processing circuit obtains the transition timing of the target signal based on the comparison result signals and delayed-time information of the analog front-end circuit.

A system for controlling a plurality of light sources particularly LED's that are provided in a number of different arrangements including a light string and controlled from a controller that includes an input microphone for detecting an audio signal, at least one pre-amplifier, a microcomputer unit receiving signals from the pre-amplifier, and a circuit for driving a plurality of LED and that enables lighting control of the plurality of LED's in accordance with the input audio signal and within a wide dynamic range.

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

To provide a lightweight and robust voltage amplifier and current amplifier for a test device for testing an electrical component, an amplifier is designed to output a test signal at a signal output between a positive output terminal and a negative output terminal. The amplifier includes a first half bridge and a second half bridge. A switching unit is provided, which is designed to connect the first half bridge and the second half bridge in parallel to the signal output in a first operating mode and to connect the first half bridge and the second half bridge in series with the signal output in a second operating mode.

A packaged RF amplifier device includes input and output leads and a transistor die. The transistor die includes a transistor with a drain-source capacitance below 0.1 picofarads per watt. The device also includes a conductive connection between the transistor output terminal and the output lead, and a baseband termination circuit between the transistor output terminal and a ground reference node. The baseband termination circuit presents a low impedance to signal energy at envelope frequencies and a high impedance to signal energy at RF frequencies. The baseband termination circuit includes an inductive element, a resistor, and a capacitor connected in series between the transistor output terminal and the ground reference node. Except for a minimal impedance transformation associated with the conductive connection, the device is unmatched between the transistor output terminal and the output lead by being devoid of impedance matching circuitry between the transistor output terminal and the output lead.