A system for thermally protecting an amplifier driving a capacitive load may include a low-pass filter configured to filter, with a variable cutoff frequency, an input signal to generate a filtered input signal, wherein the amplifier is configured to receive the filtered input signal and amplify the filtered input signal to generate a driving signal to the capacitive load and a controller configured to receive a real-time estimate of a temperature associated with the amplifier and vary the variable cutoff frequency as a function of the temperature.

In one general aspect, an amplifier can include an input amplifier circuit configured to receive a bias current and receive, as an input, a signal pair connected differentially to the input amplifier circuit, the input amplifier circuit configured to output a differential output signal pair based on the received differential input signal pair, a feedback amplifier circuit configured to receive an average of the differential output signal pair and configured to provide a bias setting output for controlling the bias current, and an output buffer circuit configured to buffer the differential output signal pair, the buffering resulting in a buffered differential output signal pair capable of driving a resistive load.

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

A power amplifier includes a power splitter that splits a first signal into a second signal and a third signal, a first amplifier that amplifies the second signal within an area where the first signal has a power level greater than or equal to a first level and that outputs a fourth signal, a second amplifier that amplifies the third signal within an area where the first signal has a power level greater than or equal to a second level higher than the first level and that outputs a fifth signal, an output unit that outputs an amplified signal of the first signal, a first and a second LC parallel resonant circuit, and a choke inductor having an end to which a power supply voltage is supplied and another end connected to a node of the first and second LC parallel resonant circuits.

An operational amplifier including an input stage coupled to an input terminal, an output stage coupled to an output terminal, and a gain node between the input stage and the output stage. A bias current source is couplable to the input stage to supply a bias current thereto and a current mirror circuit mirrors the bias current toward the gain node and the output stage. A switch circuit includes a switch activatable to bring the gain node to a pre-bias voltage and a switch coupled to the output stage and switchable between a first state and a second state in which the output stage is active and non-active, respectively. A further switch circuit is coupled to the output terminal and switchable between a first state and a second state in which the output stage is coupled to the output terminal and to a reference level, respectively.

Systems and methods for a track and hold amplifier with extended dynamic range may include a track amplifier comprising a first PMOS transistor coupled to a first NMOS transistor, a second PMOS transistor coupled to a second NMOS transistor, a capacitor at gates of each NMOS and PMOS transistor, and a plurality of switches. The track and hold amplifier is operable to, during a tracking mode of the track and hold amplifier, couple a differential input signal to each NMOS and PMOS transistor via a first switch coupled to a first capacitor coupled to the gate of the first PMOS transistor and a second capacitor coupled to the gate of the first NMOS transistor, and via a second switch coupled to a third capacitor coupled to the gate of the second PMOS and a fourth capacitor coupled to the gate of the second NMOS transistor.

A sensing circuit for an organic light-emitting diode driver includes a sample and hold circuit and a gain amplifier. The sample and hold circuit is configured to sample a sensing signal received via an input terminal. The gain amplifier is coupled to the sample and hold circuit. The sample and hold circuit includes a first capacitor, a second capacitor, a first switch, a second switch, a third switch and a fourth switch. The first capacitor is coupled between the input terminal and the gain amplifier. The second capacitor is coupled between a reference terminal and the gain amplifier. The first switch is connected between the first capacitor and the input terminal. The second switch is connected between the second capacitor and the reference terminal. The third switch is connected between the first capacitor and the gain amplifier. The fourth switch is connected between the second capacitor and the gain amplifier.

Disclosed is an operation amplification circuit and an over-current protection method therefor. The operation amplification circuit comprises: a control unit, configured to generate an output control signal according to an input signal and an output signal; an output unit, configured to generate an output current under control of the output control signal, wherein the output unit comprises an output capacitor which is charged or discharged by the output current to generate the output signal; an over-current protection unit, obtaining a temperature control current according to an operating temperature of the operation amplification circuit, wherein when the operating temperature is greater than or equal to a predetermined temperature, the temperature control current is positively correlated with the operating temperature, and the over-current protection unit adjusts the output control signal according to the temperature control current to limit the output current.

According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.

A packaged RF power amplifier comprises an output network coupled to the output of a RF power transistor, which output network comprises a plurality of first bondwires extending along a first direction between the output of transistor and an output lead of the package, a series connection of a second inductor and a first capacitor between the output of the RF power transistor and ground, and a series connection of a third inductor and a second capacitor connected in between ground and the junction between the second inductor and the first capacitor. The first and second capacitors are integrated on a single passive die and the third inductor comprises a first part and a second part connected in series, wherein the first part extends at least partially along the first direction, and wherein the second part extends at least partially in a direction opposite to the first direction.