A power amplifier includes a power splitter that splits a first signal into a second signal and a third signal, a first amplifier that amplifies the second signal within an area where the first signal has a power level greater than or equal to a first level and that outputs a fourth signal, a second amplifier that amplifies the third signal within an area where the first signal has a power level greater than or equal to a second level higher than the first level and that outputs a fifth signal, an output unit that outputs an amplified signal of the first signal, a first and a second LC parallel resonant circuit, and a choke inductor having an end to which a power supply voltage is supplied and another end connected to a node of the first and second LC parallel resonant circuits.

The present invention relates to an amplification device (10) of an input signal comprising: a first amplification stage (12), a second amplification stage (14), each amplification stage (12, 14) comprising: a switching circuit (22), the switching circuit (22) being able to generate, as output (22A, 22B), a switched signal having at least two states, and an inductive element (24) able to smooth the switched signal to obtain a smoothed signal (I1, I3), the smoothed signal (I1, I3) having a useful component and a stray component. The amplification device (10) further comprises a compensation circuit (16), for each amplification stage (12, 14), able to generate a compensation signal (I2, I4) of the stray component of the smoothed signal (I1, I3) generated in the inductive element (24) of the corresponding amplification stage (12, 14).

An amplifier circuit includes an input port, an output port, and a reference potential port, an RF amplifier device having an input terminal electrically coupled to the input port, an output terminal electrically coupled to the output port, and a reference potential terminal electrically coupled to the reference potential port. An impedance matching network is electrically connected to the output terminal, the reference potential port, and the output port. The impedance matching network includes a reactive efficiency optimization circuit that forms a parallel resonant circuit with a characteristic output impedance of the peaking amplifier at a center frequency of the fundamental frequency range. The impedance matching network includes a reactive frequency selective circuit that negates a phase shift of the RF signal in phase at the center frequency and exhibits a linear transfer characteristic in a baseband frequency range.

A power amplifier includes a power splitter that splits a first signal into a second signal and a third signal, a first amplifier that amplifies the second signal within an area where the first signal has a power level greater than or equal to a first level and that outputs a fourth signal, a second amplifier that amplifies the third signal within an area where the first signal has a power level greater than or equal to a second level higher than the first level and that outputs a fifth signal, an output unit that outputs an amplified signal of the first signal, a first and a second LC parallel resonant circuit, and a choke inductor having an end to which a power supply voltage is supplied and another end connected to a node of the first and second LC parallel resonant circuits.

According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.

A packaged RF power amplifier comprises an output network coupled to the output of a RF power transistor, which output network comprises a plurality of first bondwires extending along a first direction between the output of transistor and an output lead of the package, a series connection of a second inductor and a first capacitor between the output of the RF power transistor and ground, and a series connection of a third inductor and a second capacitor connected in between ground and the junction between the second inductor and the first capacitor. The first and second capacitors are integrated on a single passive die and the third inductor comprises a first part and a second part connected in series, wherein the first part extends at least partially along the first direction, and wherein the second part extends at least partially in a direction opposite to the first direction.

A radio frequency (RF) amplifier circuit includes an amplifier device and a first baseband bias circuit. The amplifier device includes a first input configured to receive a first signal to be amplified and a first output configured to output a first amplified signal. The first baseband bias circuit includes an input coupled to the first output of the amplifier device. The first baseband bias circuit includes a first envelope decoupling circuit and a first harmonic decoupling circuit. The first envelope decoupling circuit includes a first bulk capacitor and a first distributed inductor configured to resonate in a baseband frequency range. The first harmonic decoupling circuit includes a second bulk capacitor and a second distributed inductor configured to resonate at a harmonic frequency of the frequency of the first signal received at the input of the amplifier device.

A Doherty power amplifier circuit comprises: a power divider, a carrier amplifier subcircuit, a combiner, and a peaking amplifier subcircuit, wherein a series resonance circuit is disposed between the carrier amplifier subcircuit and the combiner. In this way, reactance that would be introduced during an operating process of a conventional Doherty power amplifier circuit can be neutralized, such that a superior performance of the Doherty power amplifier circuit is ensured, and at the same time, a load-pull effect of the Doherty power amplifier circuit is improved to have a wider bandwidth, thereby realizing a communication device supporting operations in multiple frequency bands and multiple systems at the same time, and effectively lowering manufacturing and operation costs.

According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.

An amplifier circuit includes an input port, an output port, and a reference potential port, an RF amplifier device having an input terminal electrically coupled to the input port, an output terminal electrically coupled to the output port, and a reference potential terminal electrically coupled to the reference potential port. An impedance matching network is electrically connected to the output terminal, the reference potential port, and the output port. The impedance matching network includes a reactive efficiency optimization circuit that forms a parallel resonant circuit with a characteristic output impedance of the peaking amplifier at a center frequency of the fundamental frequency range. The impedance matching network includes a reactive frequency selective circuit that negates a phase shift of the RF signal in phase at the center frequency and exhibits a linear transfer characteristic in a baseband frequency range.