The present disclosure relates to an integrated wideband Radio Frequency (RF) amplifier, based on a complementary metal oxide semiconductor (CMOS) technology. In an embodiment the amplifier addresses the shortcomings of conventional wideband amplifiers and is based on a distributed amplifier (DA) topology which typically exhibit severe performance degradation when externally loaded with parasitic circuit elements. In an embodiment of the present invention a buffer amplifier at the output of a conventional DA is able to compensate the impact of parasitic elements. The disclosed circuit can be implemented by fabricating the wideband RF amplifier integrated circuit (IC) on a 130 nm CMOS technology or other comparable CMOS technologies.

A power amplifier arrangement (200) for amplifying an input signal to produce an output signal comprises a plurality N of amplifier sections (212, 213), a first input transmission line (221) comprising multiple segments and a first output transmission line (231) comprising multiple segments. Each amplifier section comprises one or more first transistors (T1) distributed along the first input transmission line (221) and the first output transmission line (231). Each amplifier section is configured to amplify a portion of the input signal to produce a portion of the output signal. A portion of the input signal is one of N portions of the input signal partitioned on any one or a combination of an amplitude basis and a time basis. The output signal is produced at an end of the first output transmission line (231) by building up N potions of the output signal from each amplifier section.

A distributed amplifier system constituted of: an input transmission line exhibit a plurality of sections; an output transmission line; an amplifier stage, an output of the amplifier stage coupled to the output transmission line and an input of the amplifier stage coupled to the input transmission line between a respective pair of the plurality of sections; a PIN diode coupled between a first end of the input transmission line and a common potential; and a circuitry coupled between a second end of the input transmission line and the common potential, the second end opposing the first end, such that there is a direct current (DC) flow through the first unidirectional electronic valve, the input transmission line and the circuitry.

Spatial power-combining devices with increased output power are disclosed. A spatial power-combining device includes a plurality of amplifier assemblies and each of the amplifier assemblies includes a plurality of amplifiers separately coupled to a plurality of antennas. An amplifier assembly includes a first amplifier sub-assembly and a second amplifier sub-assembly. The first amplifier sub-assembly includes a first amplifier, a first input antenna structure coupled to the first amplifier, and a first output antenna structure coupled to the first amplifier. The second amplifier sub-assembly includes a second amplifier, a second input antenna structure coupled to the second amplifier, and a second output antenna structure coupled to the second amplifier.

A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.

Apparatus and methods for quadrature combined Doherty amplifiers are provided herein. In certain embodiments, a separator is used to separate a radio frequency (RF) input signal into a plurality of input signal components that are amplified by a pair of Doherty amplifiers operating in quadrature. Additionally, a combiner is used to combine a plurality of output signal components generated by the pair of Doherty amplifiers, thereby generating an RF output signal exhibiting quadrature balancing.

A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.

A distributed amplifier system constituted of: an input transmission line exhibit a plurality of sections; an output transmission line; an amplifier stage, an output of the amplifier stage coupled to the output transmission line and an input of the amplifier stage coupled to the input transmission line between a respective pair of the plurality of sections; a PIN diode coupled between a first end of the input transmission line and a common potential; and a circuitry coupled between a second end of the input transmission line and the common potential, the second end opposing the first end, such that there is a direct current (DC) flow through the first unidirectional electronic valve, the input transmission line and the circuitry.

An amplifier circuit (200) for compensating an output signal provided at an output (212) of a circuit (210) is disclosed. The amplifier circuit (200) comprises an output transmission line (230) connected between the output (212) of the circuit (210) and an output port (240) and an amplifier (220). The amplifier (220) comprises multiple sub-amplifiers (221, 222, 223, 224), inputs of the multiple sub-amplifiers (221, 222, 223, 224) are coupled to an input transmission line (250) for receiving an error signal; and outputs of the multiple sub-amplifiers (221, 222, 223, 224) are coupled at respective places along the output transmission line (230) to inject a compensation signal to the output port (240). The error signal is derived from a reference input signal and the output signal of the circuit (210), and is amplified in the amplifier (220) into the compensation signal.

According to one embodiment, a differential power amplifier includes a pair of transistors, a transformer coupled to the drain terminals of the transistors, and an output transmission line. The differential power amplifier operates in a range of frequencies from a lower operating frequency to an upper operating frequency to provide a relatively linear gain between the lower operating frequency and the higher operating frequency. The drains of the transistors are coupled to the primary winding of the transformer. The output transmission line is coupled to the secondary winding of the transformer. The output transmission line further includes at least one inductor-capacitor (LC) circuit that is configured to match predetermined output impedance in view of the lower and upper operating frequencies of the differential power amplifier.