Amplifiers, amplification circuits, and phase shifters, for example, for flexibly adjusting an output phase to thereby meet a requirement of a constant phase on a link in a communications field, are provided. In one aspect, an amplifier includes first, second, and third MOS transistors. The first MOS transistor includes a gate separately coupled to a signal input end and a bias voltage input end, a source coupled to a power supply, and a drain separately coupled to sources of the second and third MOS transistors. A drain of the third MOS transistor is coupled to a ground, and a drain of the second MOS transistor is coupled to a signal output end. The bias voltage input end is configured to receive a bias voltage to adjust a phase difference between an input signal at the signal input end and an output signal at the signal output end.

A multiple-stage amplifier includes a driver stage die and a final stage die. The driver stage die includes a first type of semiconductor substrate (e.g., a silicon substrate), a first transistor, and an integrated portion of an interstage impedance matching circuit. A control terminal of the first transistor is electrically coupled to an RF signal input terminal of the driver stage die, and the integrated portion of the interstage impedance matching circuit is electrically coupled between a current-carrying terminal of the first transistor and an RF signal output terminal of the driver stage die. The second die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a second transistor. A connection, which is a non-integrated portion of the interstage impedance matching circuit, is electrically coupled between the RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die.

A transmitter for transmitting a signal is provided, in which the transmitter includes a power amplifier and a driver amplifier, an output of the driver amplifier being connected to an input of the power amplifier via a first load modulation device operable to match the impedance of the driver amplifier output with impedance of the power amplifier input. A second load modulation device can be connected to the output of the power amplifier and operable to match the impedance of the power amplifier output with input impedance of a further device. Envelope tracking can be applied to the power amplifier and the driving amplifier.

A power amplifier circuit includes a first transistor that amplifies an RF signal; a bias current source that supplies a bias current to a second terminal of the first transistor through a first current path; and an adjustment circuit that adjusts the bias current in accordance with a variable power-supply voltage supplied from a power-supply terminal. The adjustment circuit includes first to third resistors, and an adjustment transistor including a first terminal connected to the power-supply terminal through the first resistor, a second terminal connected to the bias current source through the second resistor, and a third terminal connected to the first current path through the third resistor. When the variable power-supply voltage is not less than a first voltage and not greater than a third voltage, the adjustment circuit increases a current that flows to the power-supply terminal through a second current path as the variable power-supply voltage decreases.

The disclosure provides an amplifying apparatus including a plurality of amplifying circuits and an adjusting circuit. The input terminals of the amplifying circuits are coupled to a first common node. The output terminals of the amplifying circuits are coupled to a second common node. The adjusting circuit adjusts an input signal to generate an adjusted signal to the first common node; the adjusting circuit adjusts the signal of the second common node; or the adjusting circuit adjusts the input signal to generate the adjusted signal to the first common node and adjusts the signal of the second common node. The first control signal and the second control signal respectively control the amplifying circuits and the adjusting circuit to determine the gain, the linear power, and the output current of the amplifying apparatus.

A transistor includes an active region bounded by an outer periphery and formed in a substrate. The active region includes sets of input fingers, output fingers, and common fingers disposed within the substrate and oriented substantially parallel to one another. The transistor further includes an input port, an output port, a first via connection disposed at the outer periphery of the active region proximate the input port and a second via connection disposed at the outer periphery of the active region proximate the output port. The second via connection has a noncircular cross-section with a second major axis and a second minor axis, the second major axis having a second major axis length, the second minor axis having a second minor axis length that is less than the second major axis length. The second major axis is oriented parallel to a longitudinal dimension of the input, output, and common fingers.

A multiple-path amplifier (e.g., a Doherty amplifier) includes a first transistor (e.g., a main amplifier FET), a second transistor (e.g., a peaking amplifier FET), a combining node, and a shunt-inductance circuit. The first and second amplifiers and the combining node structure are integrally-formed with a semiconductor die, and the shunt-inductance circuit is integrated with the die. Outputs of the first and second transistors are electrically coupled to the combining node structure. The shunt-inductance circuit is electrically coupled between the combining node structure and a ground reference node. The shunt-inductance circuit includes a shunt inductance (e.g., including wirebond(s) and/or spiral inductor(s)) that is integrated with the semiconductor die. The multiple-path amplifier also may include an integrated phase shifter/impedance inverter coupled between the outputs of the first and second transistors, and which is configured to impart a 90-degree phase delay between intrinsic drains of the first and second transistors.

Apparatus and methods for power amplifier output matching is disclosed. In one aspect, there is provided an output matching circuit including an input configured to receive an amplified radio frequency signal from a power amplifier, a first output, and a second output. The output matching circuit further includes a first matching circuit electrically connected between the input of the output matching circuit and the first output, the first matching circuit configured to suppress harmonics of a fundamental frequency of the amplified radio frequency signal when the amplified radio frequency signal is within a first band. The output matching circuit further includes a second matching circuit electrically connected between the input of the output matching circuit and the second output, the second matching circuit configured to suppress harmonics of the fundamental frequency of the amplified radio frequency signal when the amplified radio frequency signal is within a second band different from the first band.

Temperature compensation circuits and methods for adjusting one or more circuit parameters of a power amplifier (PA) to maintain approximately constant Gain versus time during pulsed operation sufficient to substantially offset self-heating of the PA. Some embodiments compensate for PA Gain droop due to self-heating using a Sample and Hold (S&H) circuit. The S&H circuit samples and holds an initial temperature of the PA at commencement of a pulse. Thereafter, the S&H circuit generates a continuous measurement that corresponds to the temperature of the PA during the remainder of the pulse. A Gain Control signal is generated that is a function of the difference between the initial temperature and the operating temperature of the PA as the PA self-heats for the duration of the pulse. The Gain Control signal is applied to one or more adjustable or tunable circuits within a PA to offset the Gain droop of the PA.

This application relates to amplifier circuitry for amplifying an input signal from a MEMS capacitive sensor. The amplifier circuitry includes a first amplifier for receiving the input signal (V.sub.INP) and outputting a first output signal (V.sub.OUTP) based on the input signal. A second amplifier is configured to output a second output signal (V.sub.OUTN) which varies inversely with the first output signal. The first and second amplifier outputs are connected via first and second impedances so that a voltage at a common-mode node is equal to a common-mode voltage of the first and second output signals. The second amplifier has an input stage having an input terminal connected to a first reference voltage (V.sub.R1) and a feedback terminal connected to the common-mode node. The second amplifier also has an output stage connected between an output terminal of the input stage and the second amplifier output.