Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, and a bias control circuit that biases the power amplifier. The power management circuit is operable in multiple supply control modes, such as an average power tracking (APT) mode and an envelope tracking (ET) mode. The bias control circuit is configured to switch a bias of the power amplifier based on the supply control mode of the power management circuit.

A high frequency amplifier 1 includes an input terminal P.sub.IN, an output terminal P.sub.OUT, a transistor 5 configured to amplify an RF signal applied to the input terminal P.sub.IN, a matching circuit 9 for a fundamental of the RF signal and a reflection circuit 7 for a harmonic relative to the fundamental, the matching circuit 9 and the reflection circuit 7 being connected in series between the transistor 5 and the output terminal P.sub.OUT, an extraction circuit 13 configured to extract a harmonic appearing at the output terminal P.sub.OUT, processing circuits 15, 17 configured to adjust a phase and intensity of the harmonic extracted by the extraction circuit 13, and a multiplexing circuit 19 configured to multiplex the harmonic processed by the processing circuits 15, 17 to the harmonic reflected by the reflection circuit 7 and give the multiplexed harmonic to the transistor 5.

A first power amplifier amplifies first transmission signals in a first frequency band and outputs the resultant signals. A first matching circuit includes a plurality of first inductor portions and is connected to an output pad electrode of the first power amplifier. A second power amplifier amplifies second transmission signals in a second frequency band higher than the first frequency band and outputs the resultant signals. A second matching circuit includes at least one second inductor portion and is connected to an output side of the second power amplifier. A multilayer substrate has a first main surface and a second main surface located opposite to each other and is provided with the first and second power amplifiers and the first and second matching circuits. The first inductor portion closer than the other first inductor portions to the output pad electrode includes an inner-layer inductor portion located in the multilayer substrate.

A matching circuit structure for effectively suppressing the low-frequency clutter of a power amplifier of a mobile phone, falling within the technical field of radio frequency Pas is provided. The circuit structure includes an input end, a blocking capacitor, a power amplifier (PA), an output matching network and an output end connected in series; and the matching circuit structure further includes a negative feedback network connected in parallel to a transmission end of the PA; the negative feedback network includes a resonant capacitor, a resonant inductor and a matching inductor; the resonant capacitor and the resonant inductor are connected in parallel to form a frequency selecting network, and the frequency selecting network is connected in series with the matching inductor and to the ground. The matching circuit structure above can be used to effectively suppress the low-frequency clutter of a power amplifier.

A radio-frequency power amplification circuit includes: a power amplification sub-circuit and an output matching sub-circuit, wherein the power amplification sub-circuit is used for selecting, according to a received control signal corresponding to a radio-frequency mode, a power amplification parameter corresponding to the radio-frequency mode to amplify a received radio-frequency signal, and outputting the amplified radio-frequency signal; the output matching sub-circuit is connected to the power amplification sub-circuit and is used for receiving the amplified radio-frequency signal, and transmitting, according to the control signal, the amplified radio-frequency signal by using an impedance corresponding to the radio-frequency mode.

The present disclosure is to improve the power added efficiency of a power amplifier at high output power. The power amplifier includes: a first capacitor with a radio frequency signal input to one end thereof; a first transistor whose base is connected to the other end of the first capacitor to amplify the radio frequency signal; a bias circuit for supplying bias to the base of the first transistor; and a second capacitor with one end connected to the base of the first transistor and the other end connected to the emitter of the first transistor.

A power amplifier includes initial-stage and output-stage amplifier circuits, and initial-stage and output-stage bias circuits. The initial-stage amplifier circuit includes a first high electron mobility transistor having a source electrically connected to a reference potential, and a gate to which a radio-frequency input signal is inputted, and a first heterojunction bipolar transistor having an emitter electrically connected to a drain of the first high electron mobility transistor, a base electrically connected to the reference potential in an alternate-current fashion, and a collector to which direct-current power is supplied and from which a radio-frequency signal is outputted. The output-stage amplifier circuit includes a second heterojunction bipolar transistor having an emitter electrically connected to the reference potential, a base to which the radio-frequency signal outputted from the first heterojunction bipolar transistor is inputted, and a collector to which direct-current power is supplied and from which a radio-frequency output signal is outputted.

A circuit includes a first power transistor stage internally configured to function as a voltage-controlled current source, a second power transistor stage having an input impedance which varies as a function of input power and an interstage matching network coupling an output of the first power transistor stage to an input of the second power transistor stage. The interstage matching network is configured to provide impedance inversion between the input of the second power transistor stage and the output of the first power transistor stage. The impedance inversion provided by the interstage matching network transforms the first power transistor stage from functioning as a voltage-controlled current source to functioning as a voltage-controlled voltage source at the input of the second power transistor stage.

Provided is a power amplification module that includes: a first amplification circuit that amplifies a first signal and outputs the amplified first signal as a second signal; a second amplification circuit that amplifies the second signal and outputs the amplified second signal as a third signal; and a feedback circuit that re-inputs/feeds back the second signal outputted from the first amplification circuit to the first amplification circuit as the first signal. The operation of the first amplification circuit is halted and the first signal passes through the feedback circuit and is outputted as the second signal at the time of a low power output mode.

A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor.