A multiple-stage amplifier includes a driver stage die and a final stage die. The final stage die includes a III-V semiconductor substrate (e.g., a GaN substrate) and a first transistor. The driver stage die includes another type of semiconductor substrate (e.g., a silicon substrate), a second transistor, and one or more secondary circuits that are electrically coupled to a control terminal of the first transistor. A connection (e.g., a wirebond array or other DC-coupled connection) is electrically coupled between an RF signal output terminal of the driver stage die and an RF signal input terminal of the final stage die. The secondary circuit(s) of the driver stage die include a final stage bias circuit and/or a final stage harmonic control circuit, which are electrically connected to the final stage die through various connections.

A power amplification circuit includes: a first amplifier that is input with a first signal and outputs a second signal; a bias circuit that supplies a bias current or voltage to the first amplifier; and a control voltage generating circuit that generates a control voltage in accordance with the first signal. The bias circuit includes a first transistor that outputs the bias current or voltage, a second transistor provided between the emitter or source of the first transistor and ground, and a third transistor that is supplied with the control voltage and that supplies a first current or voltage to the second transistor. The value of the first current or voltage when the signal level is a first level is larger than the value of the first current or voltage when the signal level is a second level. The first level is higher than the second level.

The disclosed technology includes device, systems, techniques, and methods for amplifying a complex modulated signal with a mixed-signal power amplifier. A mixed-signal power amplifier may include an input network for splitting an input signal to multiple signals with corresponding phase and amplitude offsets, a main power amplification path including at least an analog power amplifier for amplifying a first signal, one or more auxiliary power amplification paths including at least one digitally controlled analog power amplifier in each path for amplifying a second signal, and an output network for combining the two amplified signals. The main power amplification path and the auxiliary power amplification paths can operate together to achieve load modulation to enhance the overall power amplifier efficiency at power back-off mode and the overall power amplifier linearity. The disclosed technology further includes transmission systems incorporating the mixed-signal power amplifier.

Certain aspects of the present disclosure provide methods and apparatus for operating a power amplifier. In one example, the apparatus includes a power amplifier configured to amplify an input signal having a frequency to produce a radio frequency (RF) output signal at an output and a harmonic tuning circuit coupled between a power supply and the power amplifier output, the harmonic tuning circuit configured to reduce a current or voltage provided to the power amplifier via a resonance at one or more harmonics of the frequency of the input signal.

A bipolar transistor includes a collector layer, a base layer, and an emitter layer that are formed in this order on a compound semiconductor substrate. The emitter layer is disposed inside an edge of the base layer in plan view. A base electrode is disposed on partial regions of the emitter layer and the base layer so as to extend from an inside of the emitter layer to an outside of the base layer in plan view. An insulating film is disposed between the base electrode and a portion of the base layer, with the portion not overlapping the emitter layer. An alloy layer extends from the base electrode through the emitter layer in a thickness direction and reaches the base layer. The alloy layer contains at least one element constituting the base electrode and elements constituting the emitter layer and the base layer.

Various methods and circuital arrangements for protection of a power amplifier from over voltage are presented. According to one aspect, a protection circuit coupled to a varying supply voltage of the power amplifier controls a biasing current to the power amplifier to limit a power dissipation through the power amplifier. An overvoltage protection circuit detects a level of the varying supply voltage and decreases the biasing current as a linear function of an increasing supply voltage once the supply voltage reaches a programmable voltage level. A slope of the linear function can be made programmable. Programmability of the voltage level and the slope can be used to control biasing currents to a plurality of power amplifiers operating at different times and having different requirements in terms of voltage limits and thermal breakdown. According to another aspect a voltage to current converter for use in the overvoltage protection circuit is presented.

The present invention provides a wideband Doherty power amplifier comprising: a main power amplification device; an auxiliary power amplification device arranged in parallel with the main power amplification device; and a coupled phase compensation network configured for compensating a phase shift between the main power amplification device and the auxiliary power amplification device. The phase compensation network comprising a first transmission line section; a second transmission line section extending substantially collinearly with the first transmission line section; and two pairs of end-connected coupled transmission lines connected in parallel between the first transmission line section and the second transmission line section. The provided Doherty power amplifier demonstrated operation at 6 dB back-off between 1.3-2.3 GHz with efficiency in excess of 41%, which can be used in modern and future wireless communication systems which require power amplifiers operating over a wide frequency range.

An amplifier for signal amplification, the amplifier comprising: a signal input arrangement; a signal output arrangement; a first transistor (Q.sub.1); a second transistor (Q.sub.2); and a third transistor (Q.sub.3), wherein: the first (Q.sub.1), second (Q.sub.2) and third (Q.sub.3) transistors are coupled to one another to form a transconductance cell, the transconductance cell is coupled to the signal input arrangement and the signal output arrangement, and the transconductance cell is operable to receive a first signal from the signal input arrangement, amplify the first signal and output an amplified first signal to the signal output arrangement. There is also disclosed a receiver incorporating the amplifier and methods of operating the amplifier.

An RF front end provides high receive selectivity by selectively configuring matching networks within a Time Division Duplex transceiver. One or more elements of the transmit or receive signal paths are configured to perform multiple functions. Each of the functions can be performed in dependence on an operating mode of the RF front end. In some embodiments, one or more elements in the transmit or receive signal paths are reconfigured during receive portions of operation to provide additional receive selectivity.

A radio frequency amplifier circuit has a signal input and a signal output. A primary amplifier is connected to the signal input and the signal output. A low dropout voltage regulator is connectible to an external power supply and to the primary amplifier, and generates a set voltage to bias the primary amplifier from a variable voltage provided by the external power supply. An equivalent capacitance circuit is connected to the primary amplifier and to the low dropout voltage regulator. The equivalent capacitance circuit defines a low dropout voltage regulator output capacitance in a nano-Farad to micro-Farad range absent any passive capacitor components corresponding thereto to maintain linearity of the primary amplifier.