A low noise amplifying system with adjustable gain. The low noise amplifier includes a plurality of gain stages, including a first stage and a last stage each having fixed gain, and an intermediate stage having adjustable gain. The intermediate stage is an inverting gain stage that includes a field effect transistor connected from the output to the input, to provide negative feedback, reducing the gain as a control voltage (applied to the gate of the field effect transistor) is adjusted to decrease the channel resistance of the field effect transistor. A control circuit measures the input and output signal power of the amplifying system and adjusts the gain of one or more intermediate stages to trade off linearity against noise figure.

A power amplifier circuit includes first and second transistors and a first voltage output circuit. A radio frequency signal is input into a base of the first transistor. The first voltage output circuit outputs a first voltage in accordance with a power supply voltage. The first voltage is supplied to a base or a gate of the second transistor. An emitter or a source of the second transistor is connected to a collector of the first transistor. A first amplified signal generated by amplifying the radio frequency signal is output from a collector or a drain of the second transistor.

An amplifier according to an embodiment of the present invention includes a first transistor and a second transistor that are connected between a ground point and a power supply. A control terminal of the first transistor is connected to an input terminal. A first terminal of the first transistor is connected to the ground point. A second terminal of the second transistor is connected to an output terminal. The amplifier further includes an impedance element and a variable resistance unit. The impedance element is connected between the second terminal of the second transistor and the power supply. The variable resistance unit is connected between the second terminal of the first transistor and the first terminal of the second transistor.

A power amplifier may include a first amplifying circuit configured to amplify an input RF signal; a second amplifying circuit connected to the first amplifying circuit in parallel configured to amplify the input RF signal; and a controller connected to at least one of the first amplifying circuit and the second amplifying circuit and configured to output a control signal in order to control an on-off state of at least one of the first amplifying circuit and the second amplifying circuit. Such an approach provides high efficiency without adding significant complexity to the power amplifier.

A packaged RF amplifier device includes input and output leads and a transistor die. The transistor die includes a transistor with a drain-source capacitance below 0.1 picofarads per watt. The device also includes a conductive connection between the transistor output terminal and the output lead, and a baseband termination circuit between the transistor output terminal and a ground reference node. The baseband termination circuit presents a low impedance to signal energy at envelope frequencies and a high impedance to signal energy at RF frequencies. The baseband termination circuit includes an inductive element, a resistor, and a capacitor connected in series between the transistor output terminal and the ground reference node. Except for a minimal impedance transformation associated with the conductive connection, the device is unmatched between the transistor output terminal and the output lead by being devoid of impedance matching circuitry between the transistor output terminal and the output lead.

An RF transistor amplifier circuit comprises a Group III nitride based RF transistor amplifier having a gate terminal, a Group III nitride based self-bias circuit that includes a first Group III nitride based depletion mode high electron mobility transistor, the Group III nitride based self-bias circuit configured to generate a bias voltage, and a Group III nitride based depletion mode differential amplifier that is configured to generate an inverted bias voltage from the bias voltage and to apply the inverted bias voltage to the gate terminal of the Group III nitride based RF transistor amplifier. The Group III nitride based RF transistor amplifier, the Group III nitride based self-bias circuit and the Group III nitride based depletion mode differential amplifier are all implemented in a single die.

A power amplifier system includes: a base substrate; a driver stage configured to receive and amplify an RF input signal, wherein the driver stage is disposed within the base substrate and is implemented in a first substrate; and a power stage configured to receive the RF input signal amplified by the driver stage and amplify the RF input signal amplified by the driver stage, wherein the power stage is disposed outside the base substrate and is implemented in a second substrate independent from the first substrate.

A power amplifier module can be formed that includes metamaterial matching circuits. This power amplifier module can be included as part of a front-end module of a wireless device. The front-end module can replace a passive duplexer with an active duplexer that uses the power amplifier module in combination with a low noise amplifier circuit that can include a metamaterial matching circuit. The combination of PA and LNA circuits that utilize metamaterials can provide the functionality of a duplexer without including a stand-alone or passive duplexer. Thus, in certain cases, the front-end module can provide duplexer functionality without including a separate duplexer. Advantageously, in certain cases, the size of the front-end module can be reduced by eliminating the passive duplexer. Further, the loss introduced into the signal path by the passive duplexer is eliminated improving the performance of the communication system that includes the active duplexer.

The embodiments of the present disclosure provide a low noise amplifier including: an input stage circuit; a bias circuit, adapted for providing bias to the input stage circuit; an output stage circuit; a first amplifier and a second amplifier; a first middle stage circuit, adapted for implementing inter-stage matching, signal coupling and isolation between the input stage circuit and the first amplifier; and a second middle stage circuit, adapted for implementing inter-stage matching between the first amplifier and the second amplifier, wherein the first middle stage circuit is coupled with the second middle stage circuit via the first amplifier, and the second middle stage circuit is coupled with the output stage circuit via the second amplifier. Accordingly, amplifier gain of LNA is improved without increasing power consumption.

A high frequency amplifier circuit includes a transistor including a drain, a gate, and a source, an inductance-capacitor (LC) tank connected to the drain, and a transformer connected to the gate and the source.