A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.

Parallel capacitors (5c and 5d) of impedance matching circuits (5) which are connected to two transistors (1), respectively, have their first ends connected to a ground through via holes (5e and 5f) that are used in common, respectively. Although a conventional circuit necessitates via holes by the number equal to the number of stages multiplied by the number of cells of the transistors (1) for an LPF type impedance matching circuit (3), the present circuit can halve the number of via holes of the LPF type impedance matching circuit (5), thereby being able to downsize the circuit.

A power amplification module includes a first amplification transistor that receives a first signal outputs an amplified second signal from the collector thereof; and a bias circuit that supplies a bias current to the base of the first amplification transistor. The first bias circuit includes a first transistor that is diode connected and is supplied with a bias control current; a second transistor that is diode connected, the collector thereof being connected to the emitter of the first transistor; a third transistor, the base thereof being connected to the base of the first transistor, and the bias current being output from the emitter thereof; a fourth transistor, the collector thereof being connected to the emitter of the third transistor and the base thereof being connected to the base of the second transistor; and a first capacitor between the base and the emitter of the third transistor.

A power amplification module includes a first input terminal arranged to receive a first transmission signal in a first frequency band, a second input terminal arranged to receive a second transmission signal in a second frequency band higher than the first frequency band, a first amplification circuit that amplifies the first transmission signal, a second amplification circuit that amplifies the second transmission signal, a first filter circuit located between the first input terminal and the first amplification circuit, and a second filter circuit located between the second input terminal and the second amplification circuit. The first filter circuit is a low-pass filter that allows the first frequency band to pass therethrough and that attenuates a harmonic of the first transmission signal and the second transmission signal. The second filter circuit is a high-pass filter that allows the second frequency band to pass therethrough and that attenuates the first transmission signal.

A novel and useful fully integrated switched-mode wideband 60 GHz power amplifier architecture. Using an appropriate second-harmonic termination of its output matching network, the required systematic peak current of the final stage is reduced such that the PA functions as a class-E/F.sub.2 switched-mode PA at saturation. In addition, low/moderate magnetic coupling factor transformers in the intermediate stages enable the PA to reach a high power added efficiency (PAE) and bandwidth product. Transformers of low/moderate coupling are also utilized in the preliminary stages of the PA to improve the overall bandwidth. In addition, the PA exploits the different behavior of the output impedance matching network for differential mode (DM) and common mode (CM) excitations. The PA is also stabilized against the combination of DM and CM oscillation modes. The PA also provides a technique to stabilize transformer-based mm-wave amplifiers against various modes of undesired oscillations.

An amplifier (1) is provided, in particular, wideband amplifier with an input (4) and an output (5) comprising a first amplifier stage (2) and a second amplifier stage (3), wherein the first amplifier stage (2) has an active power splitter with at least one injection point, wherein this injection point corresponds to the input (4) of the amplifier, and at least two discharge points (9a, 9b), wherein this active power splitter is formed according to a traveling wave amplifier principle and the second amplifier stage (3) has at least two injection points (11a, 11b) and at least one discharge point, wherein this discharge point corresponds to the output (5) of the amplifier and is formed as a power coupler. It is essential that the second amplifier stage (3) is formed as a power coupler, wherein this power coupler is formed according to the principle of a reactively matched amplifier.

A wireless communication device that includes a power amplifier and an antenna is provided. The power amplifier includes a first and a second power amplifying paths and a first and a second matching modules. The first and the second power amplifying paths receive a first and a second input signals respectively. The first matching module includes a first input variable load and a first phase-shifting circuit to respectively adjust the magnitude and the phase of the first input signal to generate a first output signal. The second matching module includes a second input variable load and a second phase-shifting circuit to respectively adjust the magnitude and the phase of the second input signal to generate a second output signal. The antenna is coupled to the power amplifier to transmit the first and the second output signals.

Provided is a power amplification module that includes: a first amplification circuit that amplifies a first signal and outputs the amplified first signal as a second signal; a second amplification circuit that amplifies the second signal and outputs the amplified second signal as a third signal; and a feedback circuit that re-inputs/feeds back the second signal outputted from the first amplification circuit to the first amplification circuit as the first signal. The operation of the first amplification circuit is halted and the first signal passes through the feedback circuit and is outputted as the second signal at the time of a low power output mode.

A power amplifier module includes an amplifier transistor and a bias circuit. A first power supply voltage based on a first operation mode or a second power supply voltage based on a second operation mode is supplied to the amplifier transistor. The amplifier transistor receives a first signal and outputs a second signal obtained by amplifying the first signal. The bias circuit supplies a bias current to the amplifier transistor. The bias circuit includes first and second resistors and first and second transistors. The first transistor is connected in series with the first resistor and is turned ON by a first bias control voltage which is supplied when the first operation mode is used. The second transistor is connected in series with the second resistor and is turned ON by a second bias control voltage which is supplied when the second operation mode is used.

Apparatus and methods for capacitive load reduction are disclosed. In one embodiment, a mobile device includes a supply control circuit that controls a voltage of a supply network, a plurality of radio frequency circuits that receive power from the supply network and are selectively enabled by a plurality of enable signals, a plurality of switchable capacitors electrically connected to the supply network, a plurality of field-effect transistors operatively associated with the plurality of switchable capacitors, and a bias control circuit that generates a plurality of control signals that bias the plurality of field-effect transistors based on a state of the plurality of enable signals. Each of the plurality of control signals are operable to selectively bias a corresponding one of the plurality of field-effect transistors in a cutoff mode to provide high impedance or as a dampening resistor to suppress oscillations.