An amplifier cell apparatus has an RF input node, a first power transistor in communication with the input node through a first input impedance matching network, a second power transistor in communication with the input node through a second input impedance matching network, and an RF output node in communication with the first and second power transistors through a single output impedance matching network so that the first and second input impedance matching networks are disposed on an RF input side of the amplifier cell.

An output matching circuit includes: a converter electrically connected to an output end of a power amplifier element to convert an impedance of the output end to an impedance higher than the impedance of the output end by magnetic coupling; and a first filter circuit electrically connected between the output end of the power amplifier element and the converter to make a short circuit in a frequency band different from a predetermined transmission frequency band.

Methods and devices to implement efficiently an AUX terminal in RF front end receivers using LNAs are described. The described methods implement a smaller number of switches resulting in an overall performance improvement by reducing the noise figure at the input of the LNA. The presented devices can be used in low/high gain and bypass modes and can accommodate an arbitrary number of bands over a wide frequency range.

A power amplification circuit includes first wiring supplied with a first signal having a first frequency, second wiring supplied with a second signal having a second frequency that differs from the first frequency, a first amplification circuit that amplifies the first signal supplied through the first wiring and supplies a first amplified signal to the second wiring, and a second amplification circuit that amplifies the signal supplied through the second wiring and outputs a second amplified signal.

A power amplifier circuit includes a differential amplifier circuit configured to amplify a radio-frequency signal, a transformer disposed on an output side with respect to the differential amplifier circuit and including a primary winding and a secondary winding, and a dispersion circuit coupled to a midpoint of the primary winding of the transformer and configured to operate as an adjustment circuit. The dispersion circuit is configured to adjust, based on a supply voltage controlled in accordance with the envelope of the radio-frequency signal, a bias (bias current or bias voltage) to be supplied to the differential amplifier circuit.

Apparatus and methods for power amplifier output matching is disclosed. In one aspect, there is provided an output matching circuit including an input configured to receive an amplified radio frequency signal from a power amplifier, a first output, and a second output. The output matching circuit further includes a first matching circuit electrically connected between the input of the output matching circuit and the first output, the first matching circuit configured to suppress harmonics of a fundamental frequency of the amplified radio frequency signal when the amplified radio frequency signal is within a first band. The output matching circuit further includes a second matching circuit electrically connected between the input of the output matching circuit and the second output, the second matching circuit configured to suppress harmonics of the fundamental frequency of the amplified radio frequency signal when the amplified radio frequency signal is within a second band different from the first band.

A Doherty amplifier according to an aspect of the present disclosure includes a heat sink; a resin substrate mounted on the heat sink, and having a cavity formed to expose the heat sink, the resin substrate being formed by stacking a plurality of resin layers and a plurality of metal layers; a main amplifier mounted in the cavity; a peak amplifier mounted in the cavity; and an inductor, wherein the resin substrate has a partition wall part that separates at least a portion of the main amplifier from at least a portion of the peak amplifier, the plurality of metal layers of the partition wall part are electrically connected to the heat sink, and the inductor is mounted on the partition wall part, and electrically connected to the plurality of metal layers.

Amplification circuitry is disclosed that couples neutralization transistors to amplification transistors to neutralize parasitic capacitance of the amplification transistors. Gates of a first amplification transistor and a first neutralization transistor are coupled together, and gates of a second amplification transistor and a second neutralization transistor are also coupled together. Drains of the first amplification transistor and the second neutralization transistor are coupled together, and drains of the second amplification transistor and the first neutralization transistor are also coupled together. Sources of neutralization transistors are coupled together at a node, such that a voltage swing of a first signal in the first neutralization transistor may be canceled by a voltage swing of a second signal in the second neutralization transistor. The node also couples to a resistor that prevents charge building in the neutralization transistors.

A load-insensitive power amplifier power detector that excludes the use of couplers is disclosed. The load-insensitive power amplifier power detector may include a voltage sampling circuit in electrical communication with a collector of a power amplifier and configured to sample a first voltage from the power amplifier. The load-insensitive power amplifier power detector may include a current sampling circuit in electrical communication with the collector of the power amplifier and configured to sample an output current from the power amplifier. Further, the load-insensitive power amplifier power detector may include a current-to-voltage converter connected between the voltage sampling circuit and an output of the load-insensitive power amplifier power detector. The current-to-voltage converter may be configured to convert the output current to obtain a second voltage. Moreover, a combination of the first voltage and the second voltage may form a detector voltage corresponding to an incident power of the power amplifier.

Gain is suppressed. In a power amplification circuit, a first transistor has a first input terminal, a first output terminal, and a first ground terminal. A second transistor has a second input terminal, a second output terminal, and a second ground terminal. The second input terminal is connected to the first input terminal. The second output terminal is connected to the first output terminal. A first bias circuit is connected to the first input terminal. A second bias circuit is connected to the second input terminal. A first resistor is connected between the first ground terminal and the ground. A second resistor is connected between the second ground terminal and the ground. The second resistor has a resistance value greater than that of the first resistor.