An apparatus may include a delta sigma modulator. A first portion of the delta sigma modulator may form a digital predictor while a second portion of the delta sigma modulator may form an analog approximator. An output of the analog approximator may be coupled with a quantizer. The digital predictor, the analog approximator, and the quantizer may form a digitizing loop configured to convert an analog input into a digital output. The digital predictor may be configured to generate, based on a polarity of one or more digital outputs from the quantizer, a digital prediction of an expected amplitude of the analog input. The quantizer may be configured to respond to the digital prediction by adjusting a dynamic range of the digitizing loop including by changing a quantization step size used by the quantizer to quantize the analog input. Related methods are also provided.

A radio frequency (RF) transmitter includes a set of input ports to receive baseband samples of a signal to be transmitted on a set of disjoint frequency bands, a set of filter banks, there is one filter bank for each input port, each filter bank includes a plurality of digital polyphase interpolation filters to sample a shifted phase of the corresponding sequence of baseband samples and to interpolate the sampled phases to produce a plurality of sequences of interpolated baseband phased samples with the shifted phase, and a set of oscillators banks, each oscillator bank includes a plurality of polyphase Digital Direct Synthesizer (DDS) corresponding to the plurality of digital polyphase interpolation filters to generate a plurality of sequences of samples of digital waveform. The RF transmitter includes a set of mixer banks to mix corresponding sequences of samples of digital waveform and interpolated baseband phased samples to up convert each sequence of interpolated baseband phased samples to the effective frequency, a parallel digital combiner to combine in-phase sequences of interpolated baseband phased samples of different frequency bands to produce a plurality of sequences of multiband upconverted samples, and a pulse encoder to modulate and encode the plurality of sequences of multiband upconverted samples to produce a plurality of encoded multi-band signals. The RF transmitter converts the plurality of encoded multi-band signals into a RF bitstream and radiate the RF bitstream as an analog signal.

Embodiments of the disclosure are drawn to apparatuses a hybrid switched capacitor array power amplifier (H-SCPA). The H-SCPA may have an array of storage elements divided into sub-arrays. A first sub-array may be configured to receive a delta sigma modulated (DSM) signal. A second sub-array may be configured to receive a Nyquist-rate signal. The H-SCPA may provide an output based on the received DSM and Nyquist-rate signals. The first sub-array and second sub-array may have different architectures. The DSM signal may represent the least significant bits of the signal and the Nyquist-rate signal may represent the most significant bits of the signal.

An amplifier for amplifying radio frequency signals comprising: a signal splitter configured to split an input radio frequency signal into two or more signals; and two or more switching power amplifiers. Each of the switching power amplifiers is configured to amplify a respective signal of the two or more signals using an active device and output a respective amplified signal at a respective output terminal of the switching power amplifier when the switching power amplifier is activated. Each of the two or more switching power amplifiers has a different maximum output power. The amplifier further comprises: an output node connected to each of the output terminals of the switching power amplifiers to combine the amplified signals and output a combined amplified signal; and control circuitry configured to issue control signal to control bias voltages provided to a gate of each of the active devices of the switching power amplifier to selectively activate and deactivate the active devices.

A latched comparator comprises a pre-amplifier stage with a positive input (V.sub.in,p), a negative input (V.sub.in,n); and a differential output (V.sub.out) comprising a first output (V.sub.out,1) and a second output (V.sub.out,2), the pre-amplifier stage comprising a first cascode pair, comprising a first amplifying transistor (MN2) and a first cascode transistor (MN4) connected at a first cascode node, the first amplifying transistor (MN2) being controlled by the positive input (V.sub.in,p) and the first cascode transistor (MN4) being connected, opposite to the first cascode node, to the first output (V.sub.out,1); a second cascode pair, comprising a second amplifying transistor (MN3) and a second cascode transistor (MN5) connected at a second cascode node, the second amplifying transistor (MN3) being controlled by the negative input (V.sub.in,n) and the second cascode transistor (MN5) being connected, opposite to the second cascode node, to the second output (V.sub.out,2); a first gain-boosting transistor (MN6) connected between the first output (V.sub.out,1) and the first cascode node; and a second gain-boosting transistor (MN7) connected between the second output (V.sub.out,2) and the second cascode node, wherein the first gain-boosting transistor (MN6) and the second gain-boosting transistor (MN7) are cross-coupled, so that the first gain-boosting transistor (MN6) is controlled by the second output (V.sub.out,2) and the second gain-boosting transistor (MN7) is controlled by the first output (V.sub.out,2).

An amplifier is presented with a sample and average common mode feedback resistor. The amplifier circuit includes a feedback capacitor and a feedback resistor in parallel with the feedback capacitor, where the feedback capacitor and the feedback resistor form part of the negative feedback path for the amplifier. Of note, the feedback resistor is comprised of a low pass filter in series with a switched capacitor resistor, such that the low pass filter is electrically coupled to the output of the amplifier circuit and the switched capacitor resistor is electrically coupled to the inverting input of the amplifier circuit. The amplifier circuit further includes a control circuit interfaced with switches of the switched capacitor resistor. The high pass corner of the switched capacitor resistor is preferably lower than corner of the low pass filter.

The disclosure relates to technology for an adjustable gain device that includes differential input terminals, differential output terminals, signal processing circuitry, and first and second cross-coupled segments. The first cross-coupled segment is coupled between differential input terminals of the adjustable gain device and a negative input of the signal processing circuitry. The second cross-coupled segment is coupled between differential input terminals of the adjustable gain device and a positive input of the signal processing circuitry. The adjustable gain device has a gain that is adjustable by adjusting values of the first and second cross-coupled segments, while maintaining a substantially consistent frequency response and a substantially consistent input impedance of the adjustable gain device, so long as a specified relationship between values of the first and second cross-coupled segments is kept substantially constant.

An amplification apparatus includes an amplifier having an inverting terminal, and a non-inverting terminal connected to a reset voltage node, a first capacitor connected to the inverting terminal, an input voltage being applied to the first capacitor, a second capacitor connected to the inverting terminal and an output terminal of the amplifier, and a duty-cycled resistor, connected in parallel to the second capacitor, including a first resistor. The duty-cycled resistor is configured to connect the first resistor and the inverting terminal and to disconnect the first resistor and the reset voltage node during a first time interval included in a period to complete an on-and-off cycle of the duty-cycled resistor, and disconnect the first resistor and the inverting terminal and to connect the first resistor and the reset voltage node during a second time interval included in the period.

Provided is a semiconductor device including: a first modulation circuit configured to receive a first sound source signal, sigma-delta modulate a signal based on the first sound source signal, and output a first sigma-delta modulated signal; a second modulation circuit configured to pulse-width modulate a signal based on the first sigma-delta modulated signal, and output a first pulse-width modulated signal; a first modulation inspection circuit configured to inspect the first modulation circuit; and a second modulation inspection circuit configured to inspect the second modulation circuit, in which the first modulation inspection circuit and the second modulation inspection circuit are separated from each other.

A radio frequency (RF) transmitter includes a set of input ports to receive baseband samples of a signal to be transmitted on a set of disjoint frequency bands, a set of filter banks, there is one filter bank for each input port, each filter bank includes a plurality of digital polyphase interpolation filters to sample a shifted phase of the corresponding sequence of baseband samples and to interpolate the sampled phases to produce a plurality of sequences of interpolated baseband phased samples with the shifted phase, and a set of oscillators banks, each oscillator bank includes a plurality of polyphase Digital Direct Synthesizer (DDS) corresponding to the plurality of digital polyphase interpolation filters to generate a plurality of sequences of samples of digital waveform. The RF transmitter includes a set of mixer banks to mix corresponding sequences of samples of digital waveform and interpolated baseband phased samples to up convert each sequence of interpolated baseband phased samples to the effective frequency, a parallel digital combiner to combine in-phase sequences of interpolated baseband phased samples of different frequency bands to produce a plurality of sequences of multiband upconverted samples, and a pulse encoder to modulate and encode the plurality of sequences of multiband upconverted samples to produce a plurality of encoded multi-band signals. The RF transmitter converts the plurality of encoded multi-band signals into a RF bitstream and radiate the RF bitstream as an analog signal.