A power amplifier includes a power splitter that splits a first signal into a second signal and a third signal, a first amplifier that amplifies the second signal within an area where the first signal has a power level greater than or equal to a first level and that outputs a fourth signal, a second amplifier that amplifies the third signal within an area where the first signal has a power level greater than or equal to a second level higher than the first level and that outputs a fifth signal, an output unit that outputs an amplified signal of the first signal, a first and a second LC parallel resonant circuit, and a choke inductor having an end to which a power supply voltage is supplied and another end connected to a node of the first and second LC parallel resonant circuits.

Aspects of this disclosure relate to an amplification circuit that includes a stacked amplifier and a bias circuit. The stacked amplifier includes at least a first transistor and a second transistor in series with each other. The stacked amplifier is operable in at least a first mode and a second mode. The bias circuit is configured to bias the second transistor to a linear region of operation in the first mode and to bias the second transistor as a switch in the second mode. In certain embodiments, the amplification circuit can be a power amplifier stage configured to receive a supply voltage that has a different voltage level in the first mode than in the second mode.

Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, and a bias control circuit that biases the power amplifier. The power management circuit is operable in multiple supply control modes, such as an average power tracking (APT) mode and an envelope tracking (ET) mode. The bias control circuit is configured to switch a bias of the power amplifier based on the supply control mode of the power management circuit.

Doherty amplifier having envelope control. In some embodiments, an amplifier system can include a Doherty amplifier having a carrier amplifier and a peaking amplifier, with each of the carrier amplifier and the peaking amplifier including a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the Doherty amplifier and configured to provide a bias signal to the output transistor of the cascode stage of the peaking amplifier.

Quadrature amplifier having envelope control. In some embodiments, an amplifier system can include a quadrature amplifier having first and second amplifiers configured to amplify first and second signals in quadrature relative to each other, with each of the first and second amplifiers including a cascode stage with input and output transistors arranged in a cascode configuration. The amplifier system can further include an envelope tracking bias circuit coupled to the quadrature amplifier and configured to provide a bias signal to the output transistor of the cascode stage of at least one of the first and second amplifiers.

A vector distribution method for operation of a power amplifier of a wireless transmitter including receiving, by a first amplifier circuit, a first input vector and a second input vector. The first input vector includes data derived from an input signal of the wireless transmitter and the second input vector includes other data derived from the input signal of the wireless transmitter. The method includes, in response to receiving the input signal, instructing the first amplifier circuit to output an output signal at a high voltage.

The present disclosure provides a method for compensating an imbalance between an I path and a Q path of a receiver. The method includes: sending a cosine signal and a sine signal through a signal generator, transmitting the cosine signal and the sine signal in the I path and Q path respectively; calculating autocorrelation values of the I path and the Q path in the signal receiving direction; determining a comparison result of amplitudes of the cosine signal received by the I path and the sine signal received by the Q path according to the autocorrelation values; calculating an adjustment compensation value of an analog domain gain amplifier, and an amplitude value and a phase value in a digital domain according to the comparison result of amplitudes; and compensating and adjusting the signal according to the adjustment compensation value, the amplitude value and the phase value.

An impedance measurement circuit for determining a sense current of a guard-sense capacitive sensor operated in loading mode. The circuit includes a periodic signal voltage source for providing a periodic measurement voltage, a sense current measurement circuit, a differential amplifier that is configured to sense a complex voltage difference between the sense electrode and the guard electrode, a demodulator for obtaining, with reference to the periodic measurement voltage, an in-phase component and a quadrature component of the sensed complex voltage difference, and control loops for receiving the in-phase component and the quadrature component, respectively. An output signal of the first control loop and an output signal of the second control loop are usable to form a complex voltage that serves as a complex reference voltage for the sense current measurement circuit.

A Doherty power amplifier having a main power amplification device and an auxiliary power amplification device arranged in parallel with the main power amplification device includes a load modulation circuit having a harmonic injection circuit connected with respective outputs of the main power amplification device and the auxiliary power amplification device. The harmonic injection circuit is arranged to provide a phase shift to simultaneously modulate transfer of second harmonic components generated at the main power amplification device to the auxiliary power amplification device and transfer of second harmonic components generated at the auxiliary power amplification device to the main power amplification device, when the main power amplification device and the auxiliary power amplification device are operated at saturation.

A device for phase shifting is disclosed, comprising an input amplifier, a biasing circuit, a first output amplifier and a second output amplifier being variable-gain amplifiers, and a quadrature hybrid coupler. The input amplifier is connected to an input port of the coupler, the first output amplifier is connected to a through port of the coupler, the second output amplifier is connected to a coupled port of the coupler, and the biasing circuit is connected to an isolated port of the coupler. The device also includes, the quadrature hybrid coupler configured to receive, at the input port, an input signal from the input amplifier, output, at the through port, a through signal, receive, at the isolated port, a bias signal from the biasing circuit, and output, at the coupled port, a coupled signal having a phase differing from a phase of the through signal.