The present disclosure is directed to a system and method for performing the outphasing technique without using a combiner at the output of two power amplifiers to reduce loss and distortions.

This application relates to Class D amplifier circuits (200). A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205), which may comprise an ADC (207), generates an error signal () from the output signal and the input signal. In various embodiments the extent to which the error signal () contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (205).

An amplifier, a circuit, and an optical communication system are provided. The disclosed amplifier may include a first transistor receiving a first portion of an input signal received at the amplifier, a second transistor receiving a second portion of the input signal, an automatic gain control signal that is dynamically adjustable in response to variations in an output of the amplifier, and a varactor that has its capacitance adjusted by changes in the automatic gain control signal and, as a result, adjusts a position of a pole in a transfer function of the amplifier.

A driver that drives an optical device, such as laser diode (LD) and/or optical modulator, is disclosed. The driver includes a variable gain amplifier (VGA) and a post amplifier. The post amplifier amplifies an output of the VGA to a preset amplifier as varying the gain of the VGA. The VGA includes two differential pairs each amplify the input signal oppositely in phases thereof and outputs of the differential pairs are compositely provided to the post amplifier. The gain of the VGA is varied by adjusting contribution of the second differential pair to the output of the VGA.

This application relates to Class D amplifier circuits (200). A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205), which may comprise an ADC (207), generates an error signal () from the output signal and the input signal. In various embodiments the extent to which the error signal () contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (205).

An electronic device includes a sampling circuit and a summing circuit coupled with the sampling circuit. The sampling circuit samples a pulse width of a first input pulse of a PWM input signal since a first time point on a rising edge of a clock pulse of a clock signal. The summing circuit generates a first output pulse of a PWM output signal since a second time point on a falling edge of the clock pulse. A pulse width of the first output pulse is a summation of the pulse width of the first input pulse and a pulse width of a second input pulse of the PWM input signal, and the second input pulse is the next pulse after the first input pulse.

A technology related to a transmission device of an amplitude modulation method is disclosed. In the amplitude modulation transmission device, a transmission data signal transformed into a sinusoidal wave transition form is input to a signal input stage of a cascode power amplifier, and a transmission data signal transformed into another sinusoidal wave transition form is input to a bias power stage of the cascode power amplifier. The transmission data signal transformed into the sinusoidal wave transition form has a sinusoidal wave form in a section in which input data transitions and maintain its previous value in a section in which the input data is maintained.

An amplifier for modulating the amplitude of an RF signal, the amplifier including: a plurality of amplifier circuits, each circuit being connected to a first power source, each circuit including a charge storage device and an output across which a potential difference supplied by the first power source can be applied; a switching arrangement for switching connections between the first power source, the charge storage device, and the output in each amplifier circuit, wherein each circuit includes a first switched configuration in which the charge storage device is charged by the first power source and a second switched configuration in which the charge storage device, once charged, will apply an additional potential difference across the output. The amplifier is configured to vary the amplitude of the RF signal in proportion to the sum of the potential differences applied across the output in each amplifier circuit.

The present disclosure is directed to a system and method for performing the outphasing technique without using a combiner at the output of two power amplifiers to reduce loss and distortions.

A linearity control circuit includes first and second input terminals. A first differential amplifier has a first input connected to the second input terminal and a second input connected to the first input terminal. Inputs of a first weighting circuit are respectively connected to outputs of the first differential amplifier. A second differential amplifier has a first input connected to the first input terminal and a second input connected to the second input terminal. Inputs of a second weighting circuit are respectively connected to outputs of the second differential amplifier. A summing device has a first input connected to an output of the first weighting circuit and a second input connected to an output of the second weighting circuit. An output of the summing device is an output of the linearity control circuit.