An integrated circuit includes a die that includes a circuit configured to generate a PWM signal in response to a first clock signal, and a first set of pads configured to provide amplified PWM signals to external filters. An amplifier stage is configured to provide the amplified PWM signals. The die includes two pads configured to be coupled to an external inductor, and a second set of pads configured to provide regulated voltages. An electronic converter circuit is configured to generate the regulated voltages to supply the amplifier stage. The electronic converter circuit includes a control circuit configured to drive electronic switches in response to a second clock signal to regulate the regulated voltages to a respective target value. The die includes a control block to synchronize the switching activity of the electronic switches with the switching activity of the amplifier stage.

A power encoder includes a pulse width modulator for modulating a signal according to a set of thresholds to produce a pulse width modulated (PWM) signal and a switch mode power amplifier for amplifying the PWM signal by switching states of switching devices according to amplitudes of the PWM signal. At least one or combination of a distribution of values of the voltage thresholds in the set and a distribution of values of a current generated by different switching devices are non-uniform. The set of voltage thresholds includes at least two positive voltage thresholds.

A Class-D amplifier includes a plurality of power rails, a quantizer, and a driver stage. The quantizer and the driver stage have a combined gain. For each power rail of the plurality of power rails, the Class-D amplifier senses a voltage value for the power rail and determines a ramp amplitude based on the sensed voltage value. The Class-D amplifier concurrently switches from the driver stage using a first power rail to a second power rail of the plurality of power rails and switches from the quantizer using the ramp amplitude associated with the first power rail to using the ramp amplitude associated with the second power rail so that the combined gain is constant.

An electronic control apparatus that controls actuation of an inductive load includes: a current detector that detect current flowing through the inductive load and outputs a current detection signal in an analog signal; an analog-digital converter that takes in the current detection signal at a fetch timing, and converts the current detection signal into a current detection value; and a controller that calculates a current arithmetic value by executing arithmetic processing for the current detection value, and controls the current based on the current arithmetic value. The controller obtains a sample data value of the current arithmetic value for each of a plurality of fetch timings. The controller calculates a deflection between an ideal value of the current arithmetic value and the sample data value of the current arithmetic value, and learns the fetch timing, causing the deflection with the ideal value of the current arithmetic value to be minimized.

A circuit arrangement for generating a current for an inductive load is provided. The circuit includes a switched output state, a modulator, a current measuring device, a controller, a compensator, and a summer The switched output stage is configured to generate the current from a supply voltage. The modulator is configured to modulate the supply voltage of the output stage depending on a modulator input signal of the modulator. The current measuring device is configured to determine the actual value of the current. The controller is configured to generate a controller signal depending on a setpoint value of the current and the actual value of the current. The compensator is configured to generate from the setpoint value of the current at least one compensation control signal that compensates for nonlinearities of the output stage. The summer is configured to generate the modulator input signal additively from the controller signal and the at least one compensation control signal.

This invention provides compact Power Amplifiers with improved efficiency of the circuitry and improved heat dissipation, together achieved much smaller enclosure size for use in modern installations requiring reduced height such as between the thin flat TV and wall, under the table or on the projector pole or in ceiling box and the like.

Various techniques are provided to reduce common mode disturbance associated with an amplifier, such as a class D amplifier. In one example, an amplifier includes a power stage configured to generate first and second PWM signals. The amplifier further includes an integration stage comprising input nodes configured to receive an input differential analog signal. The integration stage is configured to generate an output differential analog signal in response to the PWM signals and the input differential analog signal. The amplifier further includes an active compensation circuit configured to provide a compensation signal to the integration stage to reduce disturbances at the input nodes associated with the PWM signals switching between a common mode and a differential mode. Additional devices, systems, and methods are also provided.

An electric power converter includes a first capacitor being located between an input terminal and an output terminal, and that connects a first terminal being located between the input terminal and a ground, a reactor that connects through electric contact between the first terminal and the output terminal, a switching element that connects through electric contact between the input terminal and the output terminal, and a control unit that executes a first PWM control process controlling a pulse width of the PWM waveform by on and off of the switching device according to the fluctuation of the output voltage, and that executes a second PWM control process widening a pulse width of the PWM and a duty cycle of a PWM than those of the previous cycle when a pulse width becomes a lower limit.

A receiver circuit may be provided. The receiver circuit may include a first duty cycle adjuster configured to correct a duty cycle of a first output signal pair. The receiver circuit may include a second duty cycle adjuster configured to correct a duty cycle of a second output signal pair, based on the first output signal pair, after the first duty cycle adjuster performs a correction on the duty cycle of the first output signal pair.

A self-oscillating class D amplifier includes an integration circuit configured to integrate an input signal and output a result of the integration as an integrated signal, a comparator configured to receive the integrated signal at an inverting input terminal and output a pulse width modulation signal by comparing voltages of a non-inverting input terminal being grounded and the inverting input terminal, a switching circuit configured to power-amplify the pulse width modulation signal output from the comparator, a low-pass filter configured to extract an amplified output signal from the power-amplified pulse width modulation signal, a first feedback circuit configured to feed back the output signal of the low-pass filter to the inverting input terminal of the comparator, and a second feedback circuit configured to feed back the output signal of the low-pass filter to the integration circuit.