The present invention breaks up the frequency bands which can be filtered by a simple low-loss band-pass or low pass filter. The second harmonic frequency is reduced by use of a non-linear clipper element which controls the driving waveform symmetry and can reduce the harmonics by as much as 5-15 db which makes the filter much simpler and allows the amplifier to remain wide-band. The output waveform from the amplifier is symmetrical or nearly symmetrical.

An amplifier includes an output stage circuit and a compensation circuit. The output stage circuit includes a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The compensation circuit includes a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor. The first capacitor is coupled between the first input terminal and the second output terminal, and is configured to operate as a first Miller capacitor. The second capacitor is coupled between the second input terminal and the first output terminal, and is configured to operate as a second Miller capacitor. The third capacitor and the fourth capacitor are configured to alternately operate as the first Miller capacitor and the second Miller capacitor according to at least one clock signal.

Apparatus and methods for an inverted Doherty amplifier operating at gigahertz frequencies are described. RF fractional bandwidth and signal bandwidth may be increased over a conventional Doherty amplifier configuration when impedance-matching components and an impedance inverter in an output network of the inverted Doherty amplifier are designed based on characteristics of the main and peaking amplifier and asymmetry factor of the amplifier.

Certain aspects of the present disclosure generally relate to a differential amplifier implemented using a complementary metal-oxide-semiconductor (CMOS) structure. The differential amplifier generally includes a first pair of transistors and a second pair of transistors coupled to the first pair of transistors. The gates of the first pair of transistors and gates of the second pair of transistors may be coupled to respective differential input nodes of the differential amplifier, and drains of the first pair of transistors and drains of the second pair of transistors may be coupled to respective differential output nodes of the differential amplifier. In certain aspects, the differential amplifier may include a biasing transistor having a drain coupled to a source of a transistor of the first pair of transistors and having a gate coupled to a common-mode feedback (CMFB) path of the differential amplifier.

Generally, in accordance with the various illustrative embodiments disclosed herein, a wideband amplifier includes a direct-current (DC) differential amplifier, an alternating-current (AC) differential amplifier, and a signal combiner circuit. The frequency response of each of the DC differential amplifier and the AC amplifier can be selectively modified by placing the wideband amplifier in one of at least three different operational configurations. The three different operational configurations can be broadly interpreted as a wideband operational configuration, a low-pass operational configuration, and a high-pass operational configuration. The signal combiner circuit operates as a low-pass filter connected to an output terminal of the DC differential amplifier and as a high-pass filter connected to an output terminal of the AC differential amplifier.

Certain aspects of the present disclosure generally relate to a differential amplifier implemented using a complementary metal-oxide-semiconductor (CMOS) structure. The differential amplifier generally includes a first pair of transistors and a second pair of transistors coupled to the first pair of transistors. The gates of the first pair of transistors and gates of the second pair of transistors may be coupled to respective differential input nodes of the differential amplifier, and drains of the first pair of transistors and drains of the second pair of transistors may be coupled to respective differential output nodes of the differential amplifier. In certain aspects, the differential amplifier may include a biasing transistor having a drain coupled to a source of a transistor of the first pair of transistors and having a gate coupled to a common-mode feedback (CMFB) path of the differential amplifier.

An amplifier package may include a transistor, an output impedance matching circuit and one or more radial stub harmonic traps coupled to a control terminal of the transistor or to an output terminal of the transistor. The output impedance matching circuit and the radial stub harmonic traps may be formed on a single substrate or separate substrates, which may be formed from gallium nitride. Each radial stub harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof.

An amplifier may include a transistor and input and output matching networks. One or more harmonic trap circuits may be electrically connected to a node located between the input matching network and a gate terminal of the transistor or to a node located between the output matching network and a drain terminal of the transistor. Each harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof. The output matching network may act as an impedance inverter that provides a 90 degree insertion phase between the input of the output matching network and the load. A variable length drain feeder may connect a voltage source to an output of the output matching network.

Envelope trackers providing compensation for power amplifier output load variation are provided herein. In certain configurations, a radio frequency (RF) system includes an antenna, a power amplifier that receives a radio frequency signal and outputs an amplified radio frequency signal to the antenna, a plurality of detectors coupled to the power amplifier and operable to generate a plurality of detection signals, and an envelope tracker that controls a supply voltage of the power amplifier based on an envelope of the radio frequency signal. The envelope tracker processes the plurality of detection signals to generate a load variation detection signal indicating a change in an output load of the power amplifier arising from a change in a voltage standing wave ratio (VSWR) of the antenna. Additionally, the envelope tracker adjusts a gain of the power amplifier based on the load variation detection signal.

A distributed amplifier system comprising an impedance matching network configured to match an input impedance to an output impedance of the signal source, and a DC block configured to block DC components in the input signal. A variable gain amplifier adjusts the gain applied to the input signal based on a gain control signal to generate a gain adjusted signal. An emitter follower circuit receives and processes the gain adjusted signal to introduce gain peaking to create a modified signal. A distributed amplifier receives and amplifies the modified signal from the emitter follower circuit, to create an amplified signal. The distributed amplifier includes a termination network and one or more impedance matching elements configured for gain shaping the amplified signal. The gain peaking introduced by the emitter follower circuit is controlled by a variable current source. The distributed amplifier may be an open collector distributed amplifier.