An apparatus and method for using the known phenomena of quantum gate tunneling in semiconductor transistors to define the DC state of a charge-coupled amplifier is described. A first stage in which the tunneling current is bipolar (by pairing PMOS and NMOS transistors) in combination with a second stage with a controlled common mode voltage that can be used to control the first stage tunneling current, and thus the common mode voltage at the input. This can be done without the use of additional elements that may degrade performance or power consumption, since the input devices both process the input signal and maintain the DC operating point of the circuit. The approach may be advantageously used not only in charge-coupled amplifiers as described herein, but also in other capacitively coupled circuits such as charge balancing analog to digital converters (ADCs) and digital to analog converters (DACs).

Described are concepts, systems and techniques for dividing a communication channel such that no single radio frequency (RF) power amplifier (PA) in a remote radio head (RRH) operates over an excessively wide frequency bandwidth. This allows efficient operation of the RF PA wherein each PA transmit path is tuned for operation at a respective one of a plurality of different center frequencies (f.sub.0, f.sub.0+Δf, . . . f.sub.0+(n−1)Δf where n is an integer corresponding to the number of RF PA transmit paths.

According to one embodiment, a transformer-based in-phase and quadrature (IQ) includes a differential balun having a first inductor and a second inductor. The first inductor has a first input terminal and a first output terminal. The second inductor has a second input terminal and a second output terminal. Additionally, the IQ generator circuit includes a third inductor magnetically coupled with the first inductor. The third inductor has a first isolation terminal and a third output terminal. The IQ generator circuit also includes a fourth inductor magnetically coupled with the second inductor. The fourth inductor has a second isolation terminal and a fourth output terminal. The IQ generator circuit additionally includes a first transistor coupled to the first input terminal of the first inductor. Further, the generator circuit includes a second transistor coupled to the second input terminal of the second inductor. The first transistor, the second transistor, the first inductor, and the second inductor form a part of a differential amplifier.

Certain aspects of the present disclosure provide an amplifier. The amplifier generally includes an amplifier core circuit configured to amplify a radio frequency signal and having a first output and a second output; a transformer coupled to the amplifier core circuit, the transformer having a primary winding and a secondary winding, the primary winding being coupled to the first output and the second output of the amplifier core circuit, the secondary winding being coupled to an output node of the amplifier; and a variable resistance circuit coupled in parallel with the primary winding.

An embodiment is a distributed amplifier including amplifier blocks, each of the amplifier blocks including a first transmission line to receive input of a signal to an input end, a second transmission line to output a signal from an output end, a first termination resistor having a first end connected to a terminal end of the first transmission line, a second termination resistor having a first end connected to an input end of the second transmission line, and unit cells arranged along the first and second transmission lines, each of the unit cells having an input terminal connected to the first transmission line and an output terminal connected to the second transmission line, the amplifier blocks are connected in cascade such that a terminal end of the second transmission line of one of the amplifier blocks is connected to the first transmission line of a subsequent amplifier block.

A wide bandwidth power amplifier apparatus is provided. The wide bandwidth power amplifier apparatus includes a power amplifier circuit, a primary switcher circuit, a voltage circuit(s), and an auxiliary switcher circuit(s). The power amplifier circuit is configured to amplify a radio frequency (RF) signal based on a modulated voltage and a modulated current. The voltage circuit is configured to generate the modulated voltage and a respective part of the modulated current. The primary switcher circuit and the auxiliary switcher circuit are each configured to also generate a respective part of the modulated current. The auxiliary switcher circuit only generates the respective part of the modulated current when a bandwidth of the modulated voltage exceeds a bandwidth threshold. As such, it is possible to prevent the voltage circuit from having to source additional current when the modulated voltage exceeds the bandwidth threshold, thus helping to improve efficiency of the voltage circuit.

A broadband Doherty power amplifier is provided, which includes a power divider, a carrier power amplifier circuit, a peak power amplifier circuit, and a load modulation network. The carrier power amplifier circuit includes a carrier input matching circuit, a carrier power amplifier, and a carrier output matching circuit. The peak power amplifier circuit includes a peak input matching circuit, a peak power amplifier and a peak output matching circuit. A resistance value of a system load is Z.sub.L. An output impedance of the carrier output matching circuit is Z.sub.m and meets Z.sub.m=Z.sub.L(n+ 1). An output impedance of the peak output matching circuit is Z.sub.p and meets Z.sub.p Z.sub.L(n+1)/n. The load modulation network is configured to set an impedance of a combination point to be Z.sub.Q, whose resistance value is Z.sub.L. A method of implementing a broadband Doherty power amplifier is further provided.

A wideband radio-frequency transceiver front-end is provided. The transceiver front-end includes an antenna port and a transmission path coupled to the antenna port comprising a power amplifier and a first matching network. The transceiver front-end further includes a reception path coupled to the antenna port comprising a low noise amplifier and a second matching network. Furthermore, the transceiver front-end includes an impedance inverter coupled in-between the antenna port and the second matching network. Moreover, the transceiver front-end includes a controller comprising switching arrangement for a gate and a drain of the power amplifier. In this context, the controller is configured to initiate a first reception mode by connecting the gate of the power amplifier to ground and by connecting the drain of the power amplifier to a supply voltage.

A power amplifier circuit includes a first impedance transformer circuit arranged to connect with a carrier device, and a second impedance transformer circuit arranged to connect with a peaking device. Both the first and the second impedance transformer circuit include a parallel impedance transformer arrangement.

Aspects of the subject disclosure may include a power splitter. The power splitter can include a first splitter branch having a first amplifier with passive components, a second splitter branch having a second amplifier with passive components. The first splitter branch is substantially electrically isolated from the second splitter branch by configuring the first and second splitter branches to have similar phase delays. Outputs of the power splitter can be electrically coupled to the multi-stage amplifier. The power splitter can be manufactured on a single semiconductor die or integrally formed on the same semiconductor die with other circuits such as the multi-stage amplifier. Other embodiments are disclosed.