A chopper amplifier and method of operation are described. The chopper amplifier comprises a first chopper arranged to modulate an input signal using a first chopper signal having a chopper frequency. An amplification stage has an input arranged to receive the chopped signal and an output, and supplies an amplified signal at the output. An output chopper is arranged to integrate the amplified signal using a second chopper signal having the chopper frequency to generate an amplified output signal. The amplification stage is further configured to filter the chopped signal to attenuate signal components having frequencies lower than the chopper frequency.

A differential amplifier includes a positive leg, a negative leg, and biasing circuitry. The positive leg includes at least one positive leg transistor, a first positive leg degeneration capacitor, and positive leg degeneration capacitor biasing circuitry configured to bias the first degeneration capacitor during a reset period. The negative leg includes at least one negative leg transistor, a negative leg degeneration capacitor, and negative leg degeneration capacitor biasing circuitry configured to bias the negative leg degeneration capacitor during the reset period. The biasing circuitry biases current of both the at least one positive leg transistor and the at least one negative leg transistor based on capacitance of the first positive leg degeneration capacitor, capacitance of the first negative leg degeneration capacitor, and a sampling time during an amplification period. The differential amplifier may be a stage amplifier in an Analog to Digital Converter (ADC).

Certain aspects of the present disclosure provide methods and apparatus for implementing an amplification system. The amplification system includes an amplifier comprising differential inputs and an output. The differential inputs include an inverting input and a non-inverting input. The amplification system further includes a feedback path from the output coupled to the inverting input. The feedback path from the output is coupled to at least one of an inverting amplifier or buffer, and the at least one of the inverting amplifier or buffer is further coupled to the non-inverting input.

An audio amplifier system is described comprising: a variable gain audio processor for processing digital audio signal, a digital to analog converter coupled to the audio processor, and configured to receive the processed digital audio signal, a variable gain amplifier having an input coupled to the output of the digital to analog converter and operably connected to a power supply, a controller coupled to the variable gain audio processor and the variable gain amplifier and configured to switch the audio amplifier system between a first operating mode having a first power supply voltage value and a second operating mode having a second higher power supply voltage value; wherein the controller is operable in the first operating mode to set the audio amplifier system gain to a desired gain value and in the second operating mode to maintain the desired gain value.

Amplifiers can be used for a variety of electronic-based applications. Therefore, amplifier performance is of importance. A low noise amplifier can be interfaced after an antenna or a band-select filter as a first active stage, in a receiver since its bandwidth characteristics can be closely related to a system data rate. A bandwidth enhancement technique can be leverage for low noise amplifiers by embedding a transformer between a gate and a drain terminal of a common gate transistor in a cascode topology. The embedded transformer can introduce an additional high-frequency conjugate zero pair, which can push the gain rolling-off start-up point to a higher frequency, peak the higher frequency gain, and broaden the low noise amplifier gain bandwidth.

A low noise amplifier includes an amplifier transistor having a source, a gate, and a drain. An input node is coupled to the gate. An output node is coupled to the drain. An inductor is coupled between the gate and the drain.

A wideband amplifier includes a first stage and a second stage. The first stage includes a transconductance transistor driven by an input signal through an input transformer. The transconductance transistor couples to a cascode transistor forming an output node for the first stage. The second stage couples the output node from the first stage through an output transformer to drive an output transistor.

Methods and devices for reducing gate node instability of a differential cascode amplifier are presented. Ground return loops, and therefore corresponding parasitic inductances, are eliminated by using voltage symmetry at nodes of two cascode amplification legs of the differential cascode amplifier. Series connected capacitors are coupled between gate nodes of pairs of cascode amplifiers of the two cascode amplification legs so to create a common node connecting the two capacitors. In order to reduce peak to peak voltage variation at the common node under large signal conditions, a shunting capacitor is connected to the common node.

A computer sound card includes a power supply noise isolation circuit for reducing ground plane noise generated during application of heavy electrical loads to the power supply, such as loads presented by computer GPUs. The power supply isolation circuit isolates the output ground from the ground presented from the power supply to the isolation circuit input. The isolation circuit in one embodiment includes switching circuitry and a transformer to reduce the power supply ripple noise that might otherwise be introduced by the power supply into an amplifier such as a microphone preamp. In some embodiments a differential amplifier stage is added to the output of the microphone preamp stage to further reduce noise, such as common mode noise.

A radio frequency (RF) receiver circuit is disclosed. The RF receiver circuit includes a variable gain amplifier, configured to receive an input RF signal, and to generate an amplified RF signal based on the input RF signal, where a gain of the variable gain amplifier is variable. The RF receiver circuit also includes an RF level indicator circuit, configured to sample the amplified RF signal at non-periodic sampling intervals to generate a plurality of sampled RF signals, and to compare the sampled RF signals with one or more thresholds to generate a plurality of comparison result signals. The gain of the variable gain amplifier is determined based at least in part on the comparison result signals.