An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.

An electronic circuit includes an input matching network, a tunable resonator, a fixed output matching network and a transistor. The tunable resonator includes a varactor and an inductor connected in series. The output matching network includes at least one shunt open-stub connected to the output of the inductor in the tunable resonator and at least one transmission line connected to the at least one shunt open-stub. The transistor includes a gate connected to the input matching network, a source connected to ground, and a drain directly connected to an input of the tunable resonator.

An inductor includes a substrate, and a first coil pattern disposed on one surface of the substrate and having a spiral shape comprising a plurality of turns, wherein as the first coil pattern extends inwardly towards a center of the first coil pattern, a pattern width of the first coil pattern decreases while a center-to-center distance between two adjacent turns of the first coil pattern increases.

According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.

Power amplifiers and related methods are disclosed having configurable switched mode operation in a high-power mode of operation and a low-power mode of operation. The power amplifiers have a first cascode amplifier coupled to receive a positive differential input and a second cascode amplifier coupled to receive a negative differential input. The first and second cascode amplifiers include output stages and first/second input stages. The first input stages and the second input stages are enabled in a high-power mode of operation. The first input stages are disabled and the second input stages are enabled during a low-power mode of operation. For further embodiments, a switchable clamp operates in the low-power mode to clamp a voltage output for the second input stages. For further embodiments, the output stages are provided a variable voltage bias or are coupled to tunable capacitances that are varied between the low-power and high-power modes.

Disclosed is a device capable of compensating for amplitude-modulation to phase-modulation distortion. The device includes a transmitter and a controller. The transmitter includes an amplifier circuit, a phase-shift adjustment circuit, and an output circuit. The amplifier circuit is configured to output an amplified signal according to an input signal. The phase-shift adjustment circuit, set between the amplifier circuit and the output circuit, includes at least one of an adjustable capacitor and an adjustable inductor and is configured to adjust the phase shift of the amplified signal according to a control signal. The output circuit is configured to output an output signal according to the amplified signal. The controller is configured to generate the control signal according to the input signal, in which the control signal varies with the input signal.

A power amplifying circuit includes an amplifier that amplifies a radio-frequency signal and a bypass capacitor section connected to a power supply terminal for supplying a power supply voltage to the amplifier. The bypass capacitor section includes a first capacitor, a second capacitor, and a first switch circuit. The first capacitor includes a first end connected to a power supply path, and a second end. The second capacitor includes a first end connected to the second end of the first capacitor and a second end connected to ground. The first switch circuit includes a first terminal connected to the second end of the first capacitor and the first end of the second capacitor, and a second terminal connected to the ground. The first switch circuit switches between connection and non-connection between the second end of the first capacitor and the ground.

A circuit includes an amplifier to amplify an input signal and generate an output signal. The circuit also includes a tuning network to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, which includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure over a control structure, which is to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.

A radio frequency (RF) control system including a RF generator having a power amplifier that outputs a RF signal and a controller. A matching network receives the RF signal and generates at least one RF output signal. In a first mode of operation, the controller enables adjustment of the frequency of the RF signal and a tune element of the matching network to achieve an impedance match and in a second mode of operation the controller enables adjustment of only the tune element of the matching network to achieve an impedance match while the frequency is adjusted to a target frequency. The RF controls system operates in a continuous and pulse mode of operation.

Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. A filtering and matching circuit for an integrated circuit includes a first capacitance coupled in parallel with a first inductance, a second inductance coupled to the first inductance, and a variable second capacitance coupled between the first and second inductance. The variable second capacitance is controlled to provide filtering with respect to the RF signal as well as impedance matching with respect to a load coupled to the connection pad. For one embodiment, the variable second capacitance includes a coarse-tune variable capacitor circuit and a fine-tune variable capacitor circuit. The coarse-tuning controls impedance matching, and the fine tuning controls a notch for the filtering. The load can be an antenna for the RF communications. The integrated circuit can include a receive path, a transmit path, or both.