A tunable vector recombination amplifier comprises an input, an output, first and second amplifier circuit paths each including a respective phase shifter to receive a respective input signal from the input and to apply a respective phase shift to produce a respective phase-shifted signal, a respective interstage impedance matching network, and a respective amplifier connected between the respective phase shifter and interstage impedance matching network to receive and amplify the respective phase-shifted signal to produce a respective amplified signal, first and second controllable DC voltage sources each coupled to a respective amplifier and configured to provide a respective supply voltage to the respective amplifier, values of the supply voltages being independently controllable, and an output amplifier stage to receive, amplify, and vectorially combine the amplified signals to produce a combined signal having a specified phase determined by the phase shifts and supply-voltage values and a specified amplitude at the output.

A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g.sub.m of the input stage of the amplifier, thus improving the noise figure of the amplifier.

A dual-frequency low-noise amplifier circuit includes an input impedance matching circuit, a radio-frequency signal amplifying circuit and an output impedance matching circuit. An input end of the input impedance matching circuit inputs a radio-frequency signal, and an output end is connected to an input end of the output impedance matching circuit by means of the radio-frequency signal amplifying circuit; an output end of the output impedance matching circuit outputs an amplified radio-frequency signal; a first band radio-frequency signal is amplified, input and output switches are in a first open and closed state, and input and output impedances are first input and output impedances; and a second band radio-frequency signal is amplified, the input and output switches are in a second open and closed state, and the input and output impedances are second input and output impedances. Adjusting the dual-frequency low-noise amplifier circuit can reduce signal reflection and improve signal quality.

A dual-band low-noise amplifier circuit includes an amplification sub-circuit and a switch frequency selection circuit; the amplification sub-circuit is used for performing gain amplification on a radio frequency signal to be amplified to obtain an amplified radio frequency signal, and outputting the amplified radio frequency signal; the switch frequency selection circuit is connected to the amplification sub-circuit, and is used for controlling the state of a switch in the switch frequency selection circuit on the basis of a target frequency band corresponding to the radio frequency signal to be amplified, so that the dual-band low-noise amplifier circuit meets optimal performance in the target frequency band. In this way, low-noise amplification of dual-band signals is achieved by means of the reconfigurable structure of the low-noise amplifier circuit, and parameters such as noise figure, gain, and linearity can be kept in optimal states in each frequency band.

Example embodiments relate to power amplifiers and Doherty amplifiers that include the same. One example embodiment includes a power amplifier. The power amplifier includes one or more radiofrequency (RF) output terminals. The power amplifier also includes a Gallium Nitride (GaN) semiconductor die on which a power field-effect transistor (FET) is integrated. The FET includes a plurality of FET cells that are adjacently arranged in a row. The FET cells are connected either directly or indirectly to the one or more RF output terminals via a respective first inductor. For FET cells arranged at opposing ends of the row of FET cells, a total FET cell gate width and an inductance of the first inductor is larger and smaller than the total FET cell gate width and inductance of the first inductor for one or more FET cells arranged in the middle of the row of FET cells, respectively.

A high frequency circuit includes a transistor having an input electrode that inputs a high frequency signal and an output electrode that outputs the high frequency signal, a transmission line that is connected to any one of the input electrode and the output electrode, and transmits the high frequency signal, a coupling line electrically separated from the transmission line to an extent that an electromagnetic field coupling is enabled with the transmission line, and a resonance circuit that is connected between a first end of the coupling line and a reference potential, and minimizes an impedance between the first end and the reference potential at a resonance frequency.

A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

Embodiments of Doherty Power Amplifier (PA) and other PA packages are provided, as are systems including PA packages. In embodiments, the PA package includes a package body having a longitudinal axis, a first group of input-side leads projecting from a first side of the package body and having an intra-group lead spacing, and a first group of output-side leads projecting from a second side of the package body and also having the intra-group lead spacing. A first carrier input lead projects from the first package body side and is spaced from the first group of input-side leads by an input-side isolation gap, which has a width exceeding the intra-group lead spacing. Similarly, a first carrier output lead projects from the second package body side, is laterally aligned with the first carrier input lead, and is separated from the first group of output-side leads by an output-side isolation gap.

A transistor device includes a transistor cell comprising a channel region, a gate runner that is electrically connected to a gate electrode on the channel region and physically separated from the gate electrode, and a harmonic termination circuit electrically connected to the gate runner between the gate electrode and an input terminal of the transistor device, the harmonic termination circuit configured to terminate signals at a harmonic frequency of a fundamental operating frequency of the transistor device.

Methods and apparatus for implementing a power efficient amplifier device through the use of a main (primary) and auxiliary (secondary) power amplifier are described. The primary and secondary amplifiers operate as current sources providing current to the load. Capacitance coupling is used to couple the primary and secondary amplifier outputs. In some embodiments the combination of primary and secondary amplifiers achieve high average efficiency over the operating range of the device in which the primary and secondary amplifiers are used in combination as an amplifier device. The amplifier device is well suited for implementation using CMOS technology, e.g., N-MOSFETs, and can be implemented in an integrated circuit space efficient manner that is well suited for supporting RF transmissions in the GHz frequency range, e.g., 30 GHz frequency range. The primary amplifier in some embodiments is a CLASS-AB or B amplifier and the secondary amplifier is a CLASS-C amplifier.