An amplifier according to an embodiment of the present invention includes a first transistor and a second transistor that are connected between a ground point and a power supply. A control terminal of the first transistor is connected to an input terminal. A first terminal of the first transistor is connected to the ground point. A second terminal of the second transistor is connected to an output terminal. The amplifier further includes an impedance element and a variable resistance unit. The impedance element is connected between the second terminal of the second transistor and the power supply. The variable resistance unit is connected between the second terminal of the first transistor and the first terminal of the second transistor.

Disclosed is a bidirectional amplifier. The bidirectional amplifier includes a first matching circuit, a second matching circuit, an amplifier circuit connected between the first matching circuit and the second matching circuit, that amplifies a first input signal received from the first matching circuit to output the amplified first input signal to the second matching circuit, and that amplifies a second input signal received from the second matching circuit to output the amplified first input signal to the first matching circuit, and the first and second matching circuits have a symmetrical structure and operate complementary to each other.

A transformer is provided. The transformer includes at least one first primary turn; at least one second primary turn; and a first secondary turn and a second secondary turn. The first secondary turn and the second secondary turn are arranged laterally between the at least one first primary turn and the at least one second primary turn. The first secondary turn and the second secondary turn are arranged one above the other.

An RF transistor amplifier circuit comprises a Group III nitride based RF transistor amplifier having a gate terminal, a Group III nitride based self-bias circuit that includes a first Group III nitride based depletion mode high electron mobility transistor, the Group III nitride based self-bias circuit configured to generate a bias voltage, and a Group III nitride based depletion mode differential amplifier that is configured to generate an inverted bias voltage from the bias voltage and to apply the inverted bias voltage to the gate terminal of the Group III nitride based RF transistor amplifier. The Group III nitride based RF transistor amplifier, the Group III nitride based self-bias circuit and the Group III nitride based depletion mode differential amplifier are all implemented in a single die.

Methods and devices to improve nonlinearity performance of low noise amplifiers (LNAs) are disclosed. The described methods and devices reduce the capacitive loading of the LNA amplifying devices on the bypass path of the LNAs when operating in the bypass mode. This is performed by decoupling the active devices from ground to put the amplifying devices in a floating state, thus minimizing the impact of the gate-source capacitances of the amplifying devices on the overall linear performance of the LNA operating in the bypass mode.

A radio frequency filter includes communication bandpass filters disposed corresponding respectively to a plurality of communication bands, a switch, and a matching circuit. The switch includes a common terminal and a plurality of optionally selectable terminals, the plurality of optionally selectable terminals being individually connected to the plurality of bandpass filters in a one-to-one relation. The matching circuit is connected to the common terminal and is a common matching circuit to the plurality of communication bandpass filters. The plurality of communication bandpass filters are set such that filter characteristics of a serial circuit in combination of one of the plurality of communication bandpass filters, the one being selected by the switch, and the common matching circuit are improved in comparison with filter characteristics of the selected communication bandpass filter with respect to the communication band corresponding to the selected communication bandpass filter.

A digital-to-analog converter (DAC) circuit includes a pair of output stages, each including a DAC configured to convert a digital audio signal into an analog audio signal. A low-pass filter circuit includes an operational amplifier in signal communication with the DAC. The operation amplifier generates a filtered analog signal based on the analog audio signal. An amplifier network generates an amplified audio signal based on the filtered analog signal. The operational amplifier includes a feedback circuit path including a first node connected to the output of the amplifier network and a second node connected to the input of the operational amplifier. The amplifier network is electrically nested in the feedback circuit path.

An eVC including coarse and fine tuning networks. The coarse tuning network includes a circuit: receiving a RF input signal from a RF generator; outputting a RF output signal to a reference terminal or load; and receiving a DC bias voltage. The circuit is switched between first and second states. A capacitance of the circuit is based on the DC bias voltage while in the first state and is not based on the DC bias voltage while in the second state. The fine tuning network is connected in parallel with the coarse tuning network and includes a varactor. The varactor includes: a first diode receiving the RF input signal; and a second diode connected in a back-to-back configuration with the first diode and outputting a RF output signal to the reference terminal or load. A capacitance of the varactor is based on a second received DC bias voltage.

A power amplifier circuit includes a substrate and a semiconductor chip disposed on or above the substrate. The semiconductor chip includes a power amplifier unit that amplifies an RF signal, a ground terminal to which a ground of the power amplifier unit is coupled, and a first circuit element having a first end electrically coupled to the ground terminal without any portion outside the semiconductor chip interposed therebetween, and having a second end. The substrate includes a second circuit element having a first end electrically coupled to an output of the power amplifier unit and a second end electrically coupled to the second end of the first circuit element. The first and second circuit elements constitute a harmonic wave termination circuit. The harmonic wave termination circuit reflects, to the power amplifier unit, a harmonic wave component of the amplified RF signal output from the power amplifier unit.

In one implementation, a circuit can include a reference pin and an operational amplifier that can include an output pin, an inverting input pin and a non-inverting input pin. The inverting input pin can be electrically coupled to the output pin via a first impedance and to the reference pin via a second impedance. The non-inverting input pin can be electrically coupled to the reference pin via a third impedance and can be configured to receive a detection signal. The reference pin can be configured to receive a detection reference signal associated with the detection signal.