H03F2200/391

Cascode amplifier bias circuits

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

BALANCED RADIO FREQUENCY POWER AMPLIFIER, CHIP AND COMMUNICATION TERMINAL

Disclosed in the present invention are a balanced radio frequency power amplifier, a chip and a communication terminal. The radio frequency power amplifier divides, by means of a 90-degree power splitter unit, a radio frequency input signal into two equal-amplitude signals having a phase difference of 90 degrees, the two radio frequency input signals are amplified and then inputted into an adjustable 90-degree power combiner, and the values of a adjustable capacitor and an adjustable resistor in the adjustable 90-degree power combiner are controlled by means of a control unit, so as to synthesize the two radio frequency input signals into one radio frequency input signal when the phase difference and amplitude difference of the two signals at different frequencies are the smallest, and to input the radio frequency input signal into a circuit of the next stage by means of a specific radio frequency transmission path.

POWER AMPLIFIERS

A broadband power amplifier circuit is disclosed for providing load modulation, and includes an active element for receiving an impedance matched signal and for amplifying the impedance matched signal to supply an amplified signal, and an output matching network having a load impedance and coupled to the active element for receiving the amplified signal, the output matching network matches the load impedance to an optimum load impedance of the active element.

RF power amplifier with combined baseband, fundamental and harmonic tuning network

An amplifier circuit includes a first port, a second port, a reference potential port, and an RF amplifier device having a first terminal electrically coupled to the first port, a second terminal electrically coupled to the second port, and a reference potential terminal electrically coupled to the reference potential port. The RF amplifier device amplifies an RF signal across an RF frequency range that includes a fundamental RF frequency. An impedance matching network is electrically coupled to the first terminal and the first port. The impedance matching network includes a baseband termination circuit that presents low impedance in a baseband frequency region, a fundamental frequency matching circuit that presents a complex conjugate of an intrinsic impedance of the RF amplifier device in the RF frequency range, and a second order harmonic termination circuit that presents low impedance at second order harmonics of frequencies in the fundamental RF frequency range.

FILTER COMBINER FOR A DOHERTY AMPLIFIER, AND A DOHERTY AMPLIFIER
20220140789 · 2022-05-05 ·

A filter combiner for a Doherty amplifier includes a first port with an impedance of Z0 configured to be connected to an output of a carrier amplifier; a second port with an impedance of Z0.Math.r/(1+r) configured to be connected to a load; a third port with an impedance of Z0.Math.r/(1+r) configured to be connected to a peak amplifier, wherein r is a power ratio for the carrier amplifier to the peak amplifier; and a fourth port with an impedance of Z0 configured to be connected to an output port of the Doherty amplifier. The first port is connected to the second port via a first network that is a lowpass filter and to the third port via a second network that is a lowpass filter which is configured to operate as a band stop filter upon loading the input or the output of the second network with a high impedance when the peak amplifier is off. The third port is connected to the fourth port via a third network that is a lowpass filter configured to operate as a band stop filter upon loading the input or the output of the second network with a high impedance when the peak amplifier is off. The fourth port is connected to the second port via a fourth network that is a lowpass filter.

RF power transistor circuit

A radio frequency (RF) power transistor circuit includes a power transistor and a decoupling circuit. The power transistor has a control electrode coupled to an input terminal for receiving an RF input signal, a first current electrode for providing an RF output signal at an output terminal, and a second current electrode coupled to a voltage reference. The decoupling circuit includes a first inductive element, a first resistor, and a first capacitor coupled together in series between the first current electrode of the power transistor and the voltage reference. The decoupling circuit is for dampening a resonance at a frequency lower than an RF frequency.

Generation and synchronization of pulse-width modulated (PWM) waveforms for radio-frequency (RF) applications

Described are concepts, systems, circuits and techniques directed toward methods and apparatus for generating one or more pulse width modulated (PWM) waveforms with the ability to dynamically control pulse width and phase with respect to a reference signal.

Process of using a submerged combustion melter to produce hollow glass fiber or solid glass fiber having entrained bubbles, and burners and systems to make such fibers

Processes and systems for producing glass fibers having regions devoid of glass using submerged combustion melters, including feeding a vitrifiable feed material into a feed inlet of a melting zone of a melter vessel, and heating the vitrifiable material with at least one burner directing combustion products of an oxidant and a first fuel into the melting zone under a level of the molten material in the zone. One or more of the burners is configured to impart heat and turbulence to the molten material, producing a turbulent molten material comprising a plurality of bubbles suspended in the molten material, the bubbles comprising at least some of the combustion products, and optionally other gas species introduced by the burners. The molten material and bubbles are drawn through a bushing fluidly connected to a forehearth to produce a glass fiber comprising a plurality of interior regions substantially devoid of glass.

FULL-BRIDGE CLASS D AMPLIFIER
20230299723 · 2023-09-21 ·

The present disclosure relates to a full-bridge class D amplifier comprising a first and second half-bridge circuit, wherein each half-bridge comprises a half-bridge output terminal between a high-side switch and a low-side switch. Wherein the first and second half-bridge circuits are controlled by a respective control signal to operate in differential mode with a predetermined switching frequency and wherein each half-bridge circuit further comprises an output terminal inductor connected between the half-bridge output terminal and ground. The amplifier further comprises a first and second coil coupled to form a common mode choke, wherein the first half-bridge output terminal is connected to an input terminal of the first coil, and wherein the second half-bridge output terminal is connected to an input terminal of the second coil .

Radio-frequency power converter and radio-frequency transmission system for magnetic resonance imaging

A radio-frequency power converter and a radio-frequency transmission system for magnetic resonance imaging are provided in embodiments of the present invention. The radio-frequency power converter comprises a printed circuit board, the printed circuit board comprises a first circuit layer, a ground layer, and one or a plurality of intermediate layers located between the first circuit layer and the ground layer. A plurality of planar spiral inductors connected in parallel are formed on the first circuit layer. One ends of the plurality of inductors are connected to each other and respectively connected to one end of a first capacitor, the other ends of the plurality of inductors are respectively connected to one ends of a plurality of second capacitors, and the other ends of the plurality of second capacitors are all grounded.