Techniques for a reconfigurable broadband and noise cancellation LNA architecture with intra-CA capabilities are provided. An example of a device according the disclosure includes a resistive matching stage configured to receive a communication signal, a first cancellation path configured to receive the communication signal, the first cancellation path operably coupled to the resistive matching stage and a first load, and a first current combiner circuit operably coupled to the resistive matching stage and the first load, the first current combiner circuit being configured to control a phase of a current of the communication signal received from the resistive matching stage.

According to one embodiment, a memory device includes a memory cell including a resistance change memory element and a selector element, a word line, a bit line connected to one end of the memory cell, an operational amplifier including a non-inverting input connected to the bit line, an output circuit including a first terminal connected to an output of the operational amplifier, a second terminal connected to the bit line, and a charge/discharge circuit including a capacitor, a charge circuit and a discharge circuit, each including one end connected to an inverting input of the operational amplifier. At the time of falling of a write voltage for the memory cell, a potential of the other end of the memory cell is set higher than a potential of the other end of the discharge circuit.

A power amplifier (PA) circuit includes a circuit for generating a supply voltage at an upper voltage rail for a power amplifier (PA). The circuit includes a DC-to-DC converter for generating a voltage from which the supply voltage is generated; a linear amplifier for sourcing or sinking current to or from the upper voltage rail via a capacitor for performing fine adjustment of the supply voltage; a first switching device coupled between an output of the linear amplifier and a lower voltage rail to selectively assist the linear amplifier sink current through the capacitor to deal with actual or anticipated transient response of the supply voltage; and a second switching device coupled between the upper voltage rail and the lower voltage rail to selectively discharge the capacitor in response to actual or anticipated transient response of the supply voltage.

A semiconductor integrated circuit including a differential amplifier circuit, a first output circuit, a second output circuit, a selection circuit, and a feedback circuit. The differential amplifier circuit is configured to operate at a first source voltage. The first output circuit is configured to receive an output of the differential amplifier circuit, output a first output, and operate at the first source voltage. The second output circuit is configured to receive an output of the differential amplifier circuit, output a second output, and operate at a second source voltage lower than the first source voltage. The selection circuit is configured to select one of the first output from the first output circuit and the second output from the second output circuit according to an operating phase determined by an external control signal. The feedback circuit is connected between the differential amplifier circuit and the selection circuit. The feedback circuit is configured to feed the selected output back to the differential amplifier circuit.

Methods, systems, and devices for differential amplifier schemes for sensing memory cells are described. In one example, a memory apparatus may include a differential amplifier having a first input node configured to be coupled with a memory cell and having an output node configured to be coupled with a sense component. In some examples, the memory apparatus may also include a capacitor having a first node coupled with the first input node, and a first switching component configured to selectively couple a second node of the capacitor with the output node. The differential amplifier may configured such that a current at the output node is proportional to a difference between a voltage at the first input node of the differential amplifier and a voltage at the second input node of the differential amplifier.

Charging and discharging circuits for assisting charge pumps are disclosed. In certain embodiments, a radio frequency (RF) switch system includes an RF switch that receives an RF signal and is controlled by a switch control signal received at an input, a first charge pump configured to generate a first charge pump voltage, a level shifter powered by the first charge pump voltage and that generates the switch control signal based on a switch enable signal, and a charge pump assistance switch coupled to the input of the radio frequency switch and that activates to assist the first charge pump in response to a transition of the switch enable signal from a first state to a second state.

The disclosure relates to an electronic device and a method for wireless communication including a power amplification circuit. According to an embodiment, an electronic device may include: a radio frequency processing module comprising radio frequency circuitry, a first power amplification circuit connected to the radio frequency processing module, a second power amplification circuit connected to the radio frequency processing module and the first power amplification circuit, and a front-end module comprising circuitry connected to the second power amplification circuit and an antenna and configured to transmit a signal, wherein the second power amplification circuit is configured to acquire, from the first power amplification circuit, a first signal obtained by amplifying a signal output from the radio frequency processing module and a second signal by amplifying a signal output from the radio frequency processing module.

A communications device includes a transmission chain coupled to an antenna a receiver chain coupled to the antenna. The receiver chain includes an amplifier device having an input coupled to the antenna. A controlled switching circuit is included in the amplifier device and is operable to selectively disconnect conduction terminals of an amplifying transistor from power supply terminals when the transmission chain is operating to pass a transmit signal to the antenna.

An output driver with programmable single-ended and differential outputs includes a first switch, a first output attenuator, and a programmable attenuator. The first switch is coupled in a shunt configuration to a first path of a differential output of a first amplifier. The first output attenuator is included in the first path and is coupled to the first switch in accordance with the shunt configuration. The programmable attenuator is included in a second path of the differential output of the first amplifier.

The present disclosure relates to a semiconductor device and a cell potential measuring apparatus capable of amplifying and reading a potential of solution with high accuracy. A reading electrode reads the potential of the solution. A differential amplifier includes a current mirror circuit. The reading electrode is connected to a first input terminal of the differential amplifier which is connected to a gate of a first input transistor connected to a diode-connected pMOS transistor of the current mirror circuit. An output terminal of the differential amplifier is connected to a second input terminal of the differential amplifier, which is connected to a gate of a second input transistor connected to a pMOS transistor of the current mirror circuit which is not diode-connected, via a capacitor. For example, the present disclosure is applied to the cell potential measuring apparatus and the like.