Patent classifications
H03F2200/399
Logarithmic detector amplifier system for use as high sensitivity selective receiver without frequency conversion
A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.
DIGITAL VARIABLE CAPACITANCE CIRCUIT, RESONANT CIRCUIT, AMPLIFICATION CIRCUIT, AND TRANSMITTER
The present invention aims to provide a digital variable capacitance circuit, a resonant circuit, an amplification circuit, and a transmitter having a high performance. A digital variable capacitance circuit 50 according to this embodiment is a digital variable capacitance circuit including a plurality of unit capacity cells 51-0 to 51-nconnected in parallel between two output terminals OUTP and OUTN, in which the unit capacity cell 51 comprises: a first capacitor Cu1 having one end connected to one output terminal OUTP; a second capacitor Cu2 that is connected in series with the first capacitor Cu1 between the two output terminals; and an NMOS transistor M1 that is connected in parallel with the second capacitor Cu2 and is controlled in accordance with a digital control signal.
Cascode amplifier bias circuits
Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
BANDWIDTH TUNING USING SINGLE-INPUT MULTIPLE-OUTPUT LOW-NOISE AMPLIFIER
Embodiments disclosed herein relate to impedance matching for outputting wide-band signals in radio frequency applications. In an example, a circuit including a low-noise amplifier (LNA) sub-circuit and a tuning sub-circuit is provided. The LNA sub-circuit is configured to couple to an antenna and includes a transistor that includes a gate, a source, and a drain, a first inductor that includes a first terminal configured to couple to the antenna and includes a second terminal, a second inductor that includes a first terminal coupled to the first terminal of the first inductor and includes a second terminal coupled to the gate of the transistor, and a third inductor that includes a first terminal coupled to the source of the transistor and includes a second terminal. The tuning sub-circuit is coupled to the source of the transistor.
Frequency tuning of narrowband low noise amplifiers
A radio frequency (RF) receiver that includes a low noise amplifier (LNA), a tunable resonant circuit, and a processor for performing calibration of the RF receiver. The processor is configured to sweep the tunable resonant circuit through a dynamic range of resonant frequency settings while estimating noise signal output power at the LNA at each setting. The processor is also configured to set the tunable resonant circuit to the setting that produces the greatest noise signal power output at the LNA.
Terrestrial broadcast wave reception-use antenna device and component of same
Provided is a terrestrial broadcast wave reception-use antenna device having performance that is equivalent to or better than that of a conventional device in frequency bands at or below an FM band even if an antenna element length is shortened to approximately 55 [mm]. An amplifier (12-A) is configured so as to include a compound semiconductor HEMT for amplifying a received wave having a frequency at or below a resonant point of an antenna element (10) among received waves of the antenna element (10), the compound semiconductor HEMT having an equivalent noise resistance of 2 [] or smaller for the received frequency so that a noise figure (NF) is approximately constant over a wide frequency band at or below the FM band.
PROCESS OF USING A SUBMERGED COMBUSTION MELTER TO PRODUCE HOLLOW GLASS FIBER OR SOLID GLASS FIBER HAVING ENTRAINED BUBBLES, AND BURNERS AND SYSTEMS TO MAKE SUCH FIBERS
Processes and systems for producing glass fibers having regions devoid of glass using submerged combustion melters, including feeding a vitrifiable feed material into a feed inlet of a melting zone of a melter vessel, and heating the vitrifiable material with at least one burner directing combustion products of an oxidant and a first fuel into the melting zone under a level of the molten material in the zone. One or more of the burners is configured to impart heat and turbulence to the molten material, producing a turbulent molten material comprising a plurality of bubbles suspended in the molten material, the bubbles comprising at least some of the combustion products, and optionally other gas species introduced by the burners. The molten material and bubbles are drawn through a bushing fluidly connected to a forehearth to produce a glass fiber comprising a plurality of interior regions substantially devoid of glass.
Cascode Amplifier Bias Circuits
Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
Source switched split LNA
A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.
Wideband amplifier
A wideband amplifier includes an input matching network for matching a transconductor stage to an input impedance and includes an output matching network for matching the transconductor stage to an output impedance. Both the input and output matching networks each includes a parallel LC tank circuit arranged in parallel with a series LC tank circuit. The tank circuit arrangements configure the input and output matching networks to be resonant at a first frequency, a midrange frequency that is greater than the first frequency, and a second frequency that is greater than the midrange frequency to provide wideband matching.