RF amplifiers are provided that include a submount such as a thermally conductive flange. A dielectric substrate is mounted on an upper surface of the submount, the dielectric substrate having a first outer sidewall, a second outer sidewall that is opposite and substantially parallel to the first outer sidewall, and an interior opening. An RF amplifier die is mounted on the submount within the interior opening of the dielectric substrate, where a longitudinal axis of the RF amplifier die defines a first axis. The RF amplifier die is positioned so that a first angle defined by the intersection of the first axis with the first outer sidewall is between 5 and 45. The dielectric substrate may be a ceramic substrate or a dielectric layer of a printed circuit board.

Disclosed are a radio frequency power amplifier for inhibiting a harmonic wave and stray, a chip and a communication terminal. The radio frequency power amplifier comprises a power source, an LDO circuit, a harmonic inhibition unit, a stray inhibition unit, an amplifying unit, and a low-pass matching network. On the one hand, by means of the power source being connected to the harmonic inhibition unit, harmonic waves and stray of the power source at a resonant frequency are inhibited. Additionally, by means of the stray inhibition unit reducing the gain of the amplifying unit at a resonant frequency, output of stray is reduced. On the other hand, by means of the low-pass matching network being embedded at an output end of the radio frequency power amplifier, harmonic waves and the stray of a radio frequency signal amplified by the amplifying unit at different frequencies is effectively inhibited.

A multiple-path amplifier (e.g., a Doherty amplifier) includes a first transistor (e.g., a main amplifier FET), a second transistor (e.g., a peaking amplifier FET), a combining node, and a shunt-inductance circuit. The first and second amplifiers and the combining node structure are integrally-formed with a semiconductor die, and the shunt-inductance circuit is integrated with the die. Outputs of the first and second transistors are electrically coupled to the combining node structure. The shunt-inductance circuit is electrically coupled between the combining node structure and a ground reference node. The shunt-inductance circuit includes a shunt inductance (e.g., including wirebond(s) and/or spiral inductor(s)) that is integrated with the semiconductor die. The multiple-path amplifier also may include an integrated phase shifter/impedance inverter coupled between the outputs of the first and second transistors, and which is configured to impart a 90-degree phase delay between intrinsic drains of the first and second transistors.

A power amplifier module includes an amplifier that amplifies an input signal and outputs the amplified signal, a harmonic termination circuit that is disposed subsequent to the amplifier and that attenuates a harmonic component of the amplified signal, the harmonic termination circuit including at least one field effect transistor (FET), and a control circuit that controls a gate voltage of the at least one FET to adjust a capacitance value of a parasitic capacitance of the at least one FET. The control circuit adjusts the capacitance value of the parasitic capacitance of the at least one FET, and thereby a resonance frequency of the harmonic termination circuit is adjusted.

A packaged amplifier circuit includes an RF package with a die pad, and RF input and output leads extending away from the die pad opposite directions. An RF transistor die is mounted on the die pad such that a first outer edge side of the RF transistor die faces the first RF lead and a second outer edge side of the RF transistor die faces the second RF lead. A passive electrical connector is integrally formed in the RF transistor die. The passive electrical connector includes a first end connection point closer to the first outer edge side, and a second end connection point closer to the second outer edge side. A first discrete reactive device is mounted on the die pad between the first outer edge side and the first RF lead. The passive electrical connector electrically couples the first discrete reactive device to the second RF lead.

A packaged amplifier circuit includes an RF package with a die pad, and RF input and output leads extending away from the die pad opposite directions. An RF transistor die is mounted on the die pad such that a first outer edge side of the RF transistor die faces the first RF lead and a second outer edge side of the RF transistor die faces the second RF lead. A passive electrical connector is integrally formed in the RF transistor die. The passive electrical connector includes a first end connection point closer to the first outer edge side, and a second end connection point closer to the second outer edge side. A first discrete reactive device is mounted on the die pad between the first outer edge side and the first RF lead. The passive electrical connector electrically couples the first discrete reactive device to the second RF lead.

A packaged RF power amplifier comprises an output network coupled to the output of a RF power transistor, which output network comprises a plurality of first bondwires extending along a first direction between the output of transistor and an output lead of the package, a series connection of a second inductor and a first capacitor between the output of the RF power transistor and ground, and a series connection of a third inductor and a second capacitor connected in between ground and the junction between the second inductor and the first capacitor. The first and second capacitors are integrated on a single passive die and the third inductor comprises a first part and a second part connected in series, wherein the first part extends at least partially along the first direction, and wherein the second part extends at least partially in a direction opposite to the first direction.

Disclosed are a radio frequency power amplifier for inhibiting a harmonic wave and stray, a chip and a communication terminal. The radio frequency power amplifier comprises a power source, an LDO circuit, a harmonic inhibition unit, a stray inhibition unit, an amplifying unit, and a low-pass matching network. On the one hand, by means of the power source being connected to the harmonic inhibition unit, harmonic waves and stray of the power source at a resonant frequency are inhibited. Additionally, by means of the stray inhibition unit reducing the gain of the amplifying unit at a resonant frequency, output of stray is reduced. On the other hand, by means of the low-pass matching network being embedded at an output end of the radio frequency power amplifier, harmonic waves and the stray of a radio frequency signal amplified by the amplifying unit at different frequencies is effectively inhibited.

A multiple-path (e.g., Doherty) amplifier includes a semiconductor die, a radio frequency (RF) signal input terminal, a combining node structure integrally formed with the semiconductor die, first and second amplifiers (e.g., main and peaking amplifiers, or vice versa) integrally formed with the semiconductor die, and a shunt circuit electrically connected between an output of the first amplifier and a ground reference node. Inputs of the first and second amplifier are electrically coupled to the RF signal input terminal, and outputs of the first and second amplifier are electrically coupled to the combining node structure. The shunt circuit includes a shunt inductance and a shunt capacitance coupled in series between the output of the first amplifier and the ground reference node, and the shunt capacitance has a first terminal coupled to the shunt inductance, and a second terminal coupled to the ground reference node.

A power amplifier module includes an amplifier that amplifies an input signal and outputs the amplified signal, a harmonic termination circuit that is disposed subsequent to the amplifier and that attenuates a harmonic component of the amplified signal, the harmonic termination circuit including at least one field effect transistor (FET), and a control circuit that controls a gate voltage of the at least one FET to adjust a capacitance value of a parasitic capacitance of the at least one FET. The control circuit adjusts the capacitance value of the parasitic capacitance of the at least one FET, and thereby a resonance frequency of the harmonic termination circuit is adjusted.