An asymmetric signal path approach is used to extract differential signals out of the photodetector (e.g., a photodiode) for amplification by a differential transimpedance amplifier (TIA). This asymmetric-path differential TIA configuration has less low-frequency Inter Symbol Interference (ISI) (also known as Baseline Wander), less high-frequency noise amplification, and higher bandwidth capabilities. There is no power penalty with this design in comparison to a single-ended TIA, can extend the range of the link for a given system power consumption, and can decrease transmitter power for a given range.

An amplification device includes an amplification unit, an impedance unit and a log power detector. The amplification unit includes an input terminal for receiving a radio-frequency signal, an output terminal for outputting an amplified radio-frequency signal, and a detected terminal for outputting a detected signal related to the radio-frequency signal. The impedance unit is used to provide an impedance. The impedance unit includes an input terminal coupled to the detected terminal of the amplification unit for receiving the detected signal, and an output terminal for outputting a power signal. The log power detector is used to generate a power indication signal according to the power signal. The log power detector includes an input terminal coupled to the output terminal of the impedance unit, and an output terminal for outputting the power indication signal.

A sub-40 kilohertz low-frequency cutoff is provided for via a transimpedance amplifier comprising differential inputs and differential outputs; coupling capacitors comprising input terminals configured to receive electrical signals, and output terminals coupled to the differential inputs; and feedback paths coupled to the differential outputs and operable to level shift voltage levels at the input terminals. In some embodiments, the feedback paths comprise source follower transistors wherein the differential outputs are coupled to gate terminals of the source follower transistors or the feedback paths further comprise feedback resistors. In some embodiments, a bias resistor is coupled between the differential inputs.

A transmitting and receiving device having a module (GSZ) with a configurable HF high-power amplifier (HPA) that includes a main power amplifier (DM) with a main amplifier core and at least one peak power amplifier (DP1) having an auxiliary amplifier core. A switching element connected to inputs of the main power amplifier and the at least one peak power amplifier is connected to a digital input signal divider (ET) having a plurality of outputs and an output combiner (C) is connected to outputs of the amplifier cores for the main power amplifier and the at least one peak power amplifier. A multi-harmonic transformation line (LAH) is connected at the amplifier core output of the main power amplifier and at the amplifier core output of the at least one peak power amplifier, and a circulator (Z1) is connected to the output of the output combiner or an impedance converter (AN1).

A radio frequency amplifier circuit is provided. A matching circuit is configured on a radio frequency path of an input end or an output end of an amplifier. An inductance-capacitance resonance circuit and the matching circuit share an inductor included in the matching circuit to generate a corresponding resonance frequency. The matching circuit provides an input impedance or an output impedance matching two fundamental tones in a radio frequency signal at a first frequency and a second frequency. The inductance-capacitance resonance circuit provides a filtering path for filtering a signal component outside a frequency band formed by the first frequency and the second frequency in the radio frequency signal.

A power amplifier including a cascode output stage, a bias circuit, and a temperature compensation and bias boost circuit. The cascode output stage has an input and an output and includes first and second transistors connected in series. A base of the first transistor is coupled to the input, an emitter of the first transistor is coupled to a reference potential, a collector of the first transistor is coupled to an emitter of the second transistor, and a collector of the second transistor is coupled to a supply voltage and the output. The bias circuit is coupled to the base of the second transistor. The bias boost circuit is coupled to the base of the first transistor, compensates for changes in temperature of the cascode output stage, and increases a bias current provided to the first transistor responsive to an increase in the temperature of the cascode output stage.

This application provides an operational amplifier that increases the stability and settling speed of a common-mode feedback circuit. The operational amplifier includes N stages of amplifiers connected in series and M common-mode feedback circuits, where N and M are integers, N≥3, and N≥M>1. An i.sup.th common-mode feedback circuit in the M common-mode feedback circuits is configured to: detect a common-mode output voltage of a (j+b).sup.th stage of amplifier, and regulate an electrical parameter of at least one of the j.sup.th stage of amplifier to the (j+b).sup.th stage of amplifier, to stabilize the common-mode output voltage of the (j+b).sup.th stage of amplifier. An M.sup.th common-mode feedback circuit is configured to detect and stabilize a common-mode output voltage of an N.sup.th stage of amplifier. Herein i, j, and b are integers, M≥i≥1, N≥j≥1, i≥j, j+b≤N, and b≥0.

A method for measuring a received signal includes receiving a differential pair of signals by a differential pair of input nodes of a differential circuit. The method includes attempting to match a first current through a first node of the differential circuit corresponding to the differential pair of signals to a second current through a second node of the differential circuit corresponding to a feedback signal. The method includes generating an output measurement signal based on the first current and the second current. The output measurement signal has a level corresponding to an average amplitude of the differential pair of signals.

A multi-stage amplifier with a high signal-to-noise ratio is introduced. Multiple amplification stages are cascaded between an input terminal and an output terminal of the amplifier. A controller switches the output stage among the multiple amplification stages from a normal mode to an attenuation mode in response to the amplifier input being lower than the threshold. In the attenuation mode, the output stage provides an attenuation resistor coupled in series with the load resistor of the amplifier. Noise is successfully attenuated by the attenuation-mode output stage.

A method includes generating a first current through a first node based on a differential pair of signals received by a differential pair of input nodes of a differential circuit of a first integrated circuit die of an isolator product. The method includes generating a second current through a second node. The second current matches the first current through the first node and is based on an attenuated version of an output measurement signal. The method includes generating the output measurement signal having a level corresponding to an average amplitude of the differential pair of signals based on the first current and the second current.