Circuits and methods for using in parallel amplification and signal combining are described herein. A circuit uses a digitally controlled multistage cascade combiner, a digital phase and drive signal amplifier controller and a digital combiner controller circuit with N parallel signals with constant amplitudes belonging to an alphabet with M discrete values and discrete phases feeding it. The signals resulting from N power amplifiers (PAs) have also constant amplitudes belonging to an alphabet with N discrete values and discrete phases prior to being fed to the multistage combiner. A digital combiner controller circuit generates digital control information to activate, or deactivate, the outputs of the PAs, where a set of digital control signals generated in digital combiner controller are used to control sets of switches, where the signals can be activated at the combiner's inputs, according to their power and phase values. The digital control information ensures that only in-phase signals are combined in the active combiner stage and any difference among the inputs of the combiners is always minimized. Both digital combiner controller and digital drive signal amplifier controller, share information about the signals not to be fed to the multistage combiner, so that PAs drive signals can also be powered off under these circumstances. In provide high efficiency amplification the signal amplifiers employed before the combining stage may be of switched or current source type.

A switched capacitor modulator (SCM) includes a RF power amplifier. The RF power amplifier receives a rectified voltage and a RF drive signal and modulates an input signal in accordance with the rectified voltage to generate a RF output signal to an output terminal. A reactance in parallel with the output terminal is configured to vary in response to a control signal to vary an equivalent reactance in parallel with the output terminal. A controller generates the control signal and a commanded phase. The commanded phase controls the RF drive signal. The reactance is at least one of a capacitance or an inductance, and the capacitance or the inductance varies in accordance with the control signal.

An apparatus includes a differential current-to-voltage conversion circuit that includes an input sampling stage circuit, a differential integration and DC signal cancellation stage circuit, and an amplification and accumulator stage circuit. An input common mode voltage of the differential current-to-voltage circuit is independent of an output common mode voltage of the differential current-to-voltage circuit.

Circuits and methods for using in parallel amplification and signal combining are described herein. A circuit uses a digitally controlled multistage cascade combiner, a digital phase and drive signal amplifier controller and a digital combiner controller circuit with N parallel signals with constant amplitudes belonging to an alphabet with M discrete values and discrete phases feeding it. The signals resulting from N power amplifiers (PAs) have also constant amplitudes belonging to an alphabet with N discrete values and discrete phases prior to being fed to the multistage combiner. A digital combiner controller circuit generates digital control information to activate, or deactivate, the outputs of the PAs, where a set of digital control signals generated in digital combiner controller are used to control sets of switches, where the signals can be activated at the combiner's inputs, according to their power and phase values. The digital control information ensures that only in-phase signals are combined in the active combiner stage and any difference among the inputs of the combiners is always minimized. Both digital combiner controller and digital drive signal amplifier controller, share information about the signals not to be fed to the multistage combiner, so that PAs drive signals can also be powered off under these circumstances. In provide high efficiency amplification the signal amplifiers employed before the combining stage may be of switched or current source type.

A power amplifier is capable of operating in a first power mode and a second power mode with a gain lower than a gain of the first power mode. The power amplifier is connected to a first common terminal of the first switch. Two or more filters are connected to two or more first selection terminals other than at least one first selection terminal among three or more first selection terminals of the first switch. The at least one first selection terminal of the first switch and at least one second selection terminal of a second switch are connected. The first switch is capable of switching between a first path passing through at least one of the two or more filters and a second path not passing through any of the two or more filters but passing through the at least one first selection terminal.

An electronic device is provided The electronic device includes a patch antenna element, at least one antenna including a first feeding unit electrically connected to the patch antenna element and a second feeding unit electrically connected to the patch antenna element so as to have a designated isolation for a signal that is input to the first feeding unit, a radio frequency integrated circuit (RFIC) which includes a first communication circuit including a first transmission circuit and a first reception circuit which are electrically connected to the first feeding unit, and a second communication circuit including a second transmission circuit and a second reception circuit which are electrically connected to the second feeding unit, and a processor.

A power amplifier module that includes a power amplifier having a plurality of amplifier gain stages, a memory device including a plurality of memory locations, and a controller to receive a control signal having at least one of a first state and a second state. The plurality of memory locations includes at least one first memory location to store a first set of configuration parameters for operation in a first mode, and at least one second memory location to store a second set of configuration parameters for operation in a second mode. The controller configures the power amplifier module in the first mode based on the first set of configuration parameters responsive to receiving the control signal having the first state and configures the power amplifier module in the second mode based on the second set of configuration parameters responsive to receiving the control signal having the second state.

Power amplifier apparatuses and techniques for optimizing the design of power amplifiers are disclosed. In one aspect, a method for optimizing a power amplifier includes selecting a circuit topology for the power amplifier. The circuit topology includes one or more photoconductive switches and an impedance matching network including one or more parameter values representative of the impedance matching network or the photoconductive switches that can be adjusted. The method further includes selecting one or more optimization goals for the impedance matching network and the one or more photoconductive switches, and adjusting the one or more parameter values according to the one or more optimization goals. The one or more optimization goals include an efficiency at a particular power output.

Chopper amplifiers with low intermodulation distortion (IMD) are provided. To compensate for IMD, at least one distortion compensation channel is included in parallel with chopper amplifier circuitry of a main signal channel. Additionally, output selection switches are included for selecting between the output of the main signal path and the distortional compensation channel(s) over time to maintain the output current continuous. Such IMD compensation can be realized by filling in missing current of the main signal channel using the distortion compensation channel(s), or by using channel outputs only when they have settled current.

A power amplifier circuit includes a power amplifier, first and second filters, and first and second output paths. The power amplifier is able to amplify both of a first signal and a second signal. The frequency of the second signal is higher than that of the first signal. The first filter includes a first inductor and attenuates the second signal amplified in the power amplifier. The first inductor serves as a path for the first signal amplified in the power amplifier. The second filter includes a first capacitor and attenuates the first signal amplified in the power amplifier. The first capacitor serves as a path for the second signal amplified in the power amplifier. The first signal outputted from the first filter is supplied to the first output path. The second signal outputted from the second filter is supplied to the second output path.