According to one embodiment, a transmit/receive (T/R) switch includes a transmit switch, between a transmit port and an antenna port, a receive switch, between a receive port and the antenna port, a transmit inductor, coupled in parallel between the transmit switch the transmit port, and a receive inductor, coupled in parallel between the transmit switch the transmit port. The T/R switch can be co-designed with a power amplifier (PA) output matching circuit.

A plurality of transmission lines (3b,3c) are connected to a transistor (1) and have different characteristic impedances. A plurality of open stubs (4a,4b) are connected to the plurality of transmission lines (3b,3c) respectively. A length of each open stub (4a,4b) is shorter than a length of each transmission line (3b,3c).

A MMIC support and cooling structure having a three-dimensional, thermally conductive support structure having a plurality of surfaces and a circuit having a plurality of heat generating electrical components disposed on a first portion of the surfaces and interconnected by microwave transmission lines disposed on a second portion of the plurality of surfaces of the thermally conductive support structure

An amplifier includes a first amplifier amplifying first signal, a first matching circuit having first end connected to output node of first amplifier, and second end connected to first intermediate node, and a first transmission line having first end connected to first intermediate node, and second end connected to first output node. At a center frequency of an operating band, a first reactance component of impedance seen from first output node toward first transmission line is smaller than a second reactance component of impedance seen from first intermediate node toward first matching circuit, and at the center frequency, a first characteristic impedance of first transmission line is 0.5 to 2 times an absolute value of first impedance seen from second end of first matching circuit toward first matching circuit when first and second ends of first matching circuit are terminated to reference impedance.

A power amplifier circuit that includes an external input terminal and an external output terminal; a first power amplifier, a second power amplifier, a third power amplifier, and a fourth power amplifier; a transformer including an input-side coil and an output-side coil; and a first transmission line, the external input terminal being connected to an input terminal of the first and second power amplifiers, an output terminal of the first power amplifier is connected to an input terminal of the third and fourth power amplifiers, output terminals of the third and fourth power amplifiers being connected to a first and second end of the input-side coil respectively, the external output terminal being connected to a first end of the output-side coil, and an output terminal of the second power amplifier being connected to a second end of the output-side coil via the first transmission line.

A power amplifier (PA) system is provided for multi-mode multi-band operations. The PA system includes one or more amplifying modules, each amplifying module including one or more banks, each bank comprising one or more transistors; and a plurality of matching modules, each matching module being configured to be adjusted to provide impedances corresponding to frequency bands and conditions. A controller dynamically controls an input terminal of each bank and adjusts the matching modules to provide a signal path to meet specifications on properties associated with signals during each time interval.

An amplifier device includes an input terminal, an output terminal, a first transistor having a control terminal and first and second current-carrying terminals, and a class-J circuit coupled between the second current-carrying terminal of the first transistor and the output terminal and configured to harmonically terminate the first transistor. The class-J circuit may include a first resonator, characterized by a first resonant frequency substantially equal to a second harmonic frequency. The first resonator may be coupled between the second current-carrying terminal and a voltage reference. A shunt inductor that is distinct from the first resonator may be coupled between the second current-carrying terminal and the voltage reference.

A power amplifier includes a two-dimensional matrix of NM active cells formed by stacking main terminals of multiple active cells in series. The stacks are coupled in parallel to form the two-dimensional matrix. The power amplifier includes a driver structure to coordinate the driving of the active cells so that the effective output power of the two-dimensional matrix is approximately NM the output power of each of the active cells.

Aspects of this disclosure relate to compensating for dynamic error vector magnitude. A compensation circuit can generate a compensation signal based at least partly on an amount of time that an amplifier, such as a power amplifier, is turned off between successive transmission bursts of the amplifier. For example, the compensation circuit can charge a capacitor based at least partly on an amount of time that the amplifier is turned off between successive transmission bursts and generate the compensation signal based at least partly on an amount of charge stored on the capacitor. A bias circuit can receive the compensation signal, generate a bias signal based at least partly on the compensation signal, and provide the bias signal to the amplifier to bias the amplifier.

An amplifier has an N number of input networks connected to an input terminal to receive an input signal, a first amplifier to amplify one output signal from the N number of input networks, a (N1) number of secondary amplifiers to amplify the remaining (N1) number of output signals, except for the one output signal, from the N number of input networks, where the amplification order of the (N1) number of secondary amplifiers is determined based on the power level of each output signal from the N number of input networks when the first amplifier is operational, an N number of output networks which are arranged, and a first bias network to supply a D.C. bias voltage to at least one of the N number of output networks. An electrical length of the first bias network is less than 90 degrees.