The present disclosure provides techniques for supply-side current protection of a load. In an example, an over-current protection circuit can include a first current-limiting circuit coupled to a first supply rail and configured to supply power to the load, and a second current-limiting circuit coupled to a second supply rail and configured to supply the power to the load in cooperation with the first current-limiting circuit.

An audio amplifier of a BTL (Bridged Tied Load) type, includes a first amplifier, a second amplifier, a first output pin connected to an output of the first amplifier, a second output pin connected to an output of the second amplifier, a first monitor pin, a second monitor pin, a current source connected to the first monitor pin and configured to be switched on and off, a switch interposed between the second monitor pin and a fixed voltage line, and a load state determination circuit configured to detect a state of a load based on a potential difference between the first monitor pin and the second monitor pin.

An audio signal control circuit includes an impedance calculator, a suppression value setter, a level detector, and a level controller. The impedance calculator is configured to calculate impedance of a speaker from voltage and current of an audio signal to be outputted to the speaker. The suppression value setter is configured to set a suppression value of the audio signal, using the impedance. The level detector is configured to perform level detection using: i) the voltage when the impedance is equal to or more than a switching threshold value, and ii) the current when the impedance is less than the switching threshold value. The level controller is configured to perform level control of the audio signal using: i) a level of a detection signal that has been detected by the level detector, and ii) the suppression value.

A power amplifying apparatus includes a first bias circuit configured to generate a first bias current, a first amplification circuit, configured to receive the first bias current, amplify a signal input to the first amplification circuit through a first node, and output a first amplified signal to a second node, a second bias circuit, configured to generate a second bias current which has a magnitude different from a magnitude of the first bias current, and a second amplification circuit, connected in parallel with the first amplification, configured to receive the second bias current, amplify the signal input through the first node, and output a second amplified signal to the second node. The second amplification circuit is configured to output the second amplified signal with a third-harmonic component that has a phase offsetting a third-order intermodulation distortion (IM3) component included in the first amplified signal, based on the second bias current.

Voltage stabilizing and voltage regulating circuits implemented in GaN HEMT technology provide stable output voltages suitable for use in applications such as GaN power transistor gate drivers and low voltage auxiliary power supplies for GaN integrated circuits. Gate driver and voltage regulator modules include at least one GaN D-mode HEMT (DHEMT) and at least two GaN E-mode HEMTs (EHEMTs) connected together in series, so that the at least one DHEMT operates as a variable resistor and the at least two EHEMTs operate as a Zener diode that limits the output voltage. The gate driver and voltage regulator modules may be implemented as a GaN integrated circuits, and may be monolithically integrated together with other components such as amplifiers and power HEMTs on a single die to provide a GaN HEMT power module IC.

A circuit element is formed on a substrate made of a compound semiconductor. A bonding pad is disposed on the circuit element so as to at least partially overlap the circuit element. The bonding pad includes a first metal film and a second metal film formed on the first metal film. A metal material of the second metal film has a higher Young's modulus than a metal material of the first metal film.

Apparatus and methods for overload protection of low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA system includes a switch having an analog control input, an LNA configured to provide amplification to a radio frequency (RF) input signal received from the switch, a detector configured to generate a detection current based on detecting a signal level of the LNA, and an error amplifier configured to amplify the detection current to generate an overload protection signal that controls the analog control input.

An amplification device includes an amplification circuit and a protection circuit. The amplification circuit includes a transistor having a first terminal for outputting an amplified radio frequency signal, a second terminal, and a control terminal coupled to the input terminal of the amplification circuit for receiving a radio frequency signal to be amplified. The protection circuit has a first terminal coupled to the output terminal or the input terminal of the amplification circuit, and a second terminal. The protection circuit includes a switch and a first voltage clamping unit. The switch unit is turned on or turned off according to a control signal. The first voltage clamping unit is coupled to the switch unit for clamping a voltage at the first terminal of the protection circuit within a predetermined region when the switch unit is turned on.

Differential input circuits employ protection transistors and feedback paths to limit the differential voltage applied to input transistors. In an example arrangement, a differential input voltage is applied to terminals of the protection transistors, and current paths couple the respective protection transistors to control terminals of the input transistors, respectively. A control terminal drive voltage source is coupled to the control terminals of the input protection transistors to control the drive voltage applied to those terminals. Feedback paths, one for each of the input transistors, control voltages applied to the control terminals of the input transistors, maintaining the input differential voltage at a relatively low level and defined by the product of a specified current value and a specified resistance value.

Various transimpedance amplifier (TIA) arrangements for ultrasonic front-end receivers used in ultrasonic sensing applications are disclosed. An example TIA includes three common-source gain stages in a feedback loop with a common-gate stage. In some aspects, the TIA may include a level shifter configured to maintain the voltage at the gate of a transistor used to implement the first common-source gain stage of the feedback loop shifted by a certain amount with respect to the voltage at an input port to the TIA. In some aspects, at least portions of the TIA may be biased using bias currents that are configured to be process-, supply voltage-, and/or temperature-dependent. Various embodiments of the TIAs disclosed herein may benefit from one or more of the following advantages: reduced noise, reduced input impedance, reduced temperature coefficient of input impedance, and stability for a wide range of sensor frequencies.