Patent classifications
H03F2200/456
SENSING CIRCUIT AND SOURCE DRIVER INCLUDING THE SAME
The present disclosure discloses a sensing circuit and a source driver including the same, capable of decreasing influence on the performance of an integrator according to a panel load and reducing a chip area by excluding a feedback capacitor of the integrator. The sensing circuit may convert an input current, received from a display panel, into an output current having linearity and an amount of current smaller than the input current.
Apparatus including electronic circuit for amplifying signal
The apparatus relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long-Term Evolution (LTE). The disclosure relates to an apparatus including an electronic circuit for amplifying a signal. The apparatus includes a transceiver including an amplification circuit, and at least one processor coupled to the transceiver. The amplification circuit includes a first path to generate a first current corresponding to a voltage of an input signal, a second path to generate a second current corresponding to a voltage of the input signal, a separation unit to control each of the first current and the second current, a current mirror to generate a third current corresponding to the first current, and a folding unit to generate an output signal on the basis of the second current and the third current.
METHODS RELATED TO AMPLIFICATION OF RADIO-FREQUENCY SIGNALS
Methods related to amplification of radio-frequency signals. In some embodiments, a method for amplifying a radio-frequency signal can include configuring a gain stage to be in a selected one of a plurality of gain settings, with at least some of the gain settings resulting in different phases for the radio-frequency signal. The method can further include adjusting the phase of the radio-frequency signal for the selected gain setting, such that the adjusted phase is part of desired phases adjusted from the different phases.
Digital wireless transmitter with merged cell switching and linearization techniques
A vector distribution method for operation of a power amplifier of a wireless transmitter including receiving, by a first amplifier circuit, a first input vector and a second input vector. The first input vector includes data derived from an input signal of the wireless transmitter and the second input vector includes other data derived from the input signal of the wireless transmitter. The method includes, in response to receiving the input signal, instructing the first amplifier circuit to output an output signal at a high voltage.
BIAS CONTROL CIRCUIT FOR POWER TRANSISTORS
A system includes a reference field effect transistor (FET), wherein the reference FET is a depletion mode transistor, and a bias control circuit. The bias control circuit includes a voltage sensor connected to a drain terminal of the reference FET. The voltage sensor is configured to measure a voltage at the drain terminal of the reference FET as a measured voltage, determine a voltage difference between a reference voltage and the measured voltage, and output the voltage difference at a voltage sensor output terminal. The system includes a translation circuit connected the voltage sensor output terminal. The translation circuit is configured to convert the voltage difference into a negative gate bias voltage, and apply the negative gate bias voltage to a gate terminal of the reference FET.
Variable-phase amplifier circuits and devices
Variable-phase amplifier circuits and devices. In some embodiments, an amplifier can include a variable-gain stage having a plurality of switchable amplification branches, with each being capable of being activated, such that a combination of one or more activated amplification branches provides respective gain level and phase shift. The plurality of switchable amplification branches can be configured such that the phase shift provided by each combination of one or more activated amplification branches compensates for a phase shift associated with the amplifier operating with the respective gain level of the variable-gain stage.
Negative impedance circuit for reducing amplifier noise
A circuit includes a first operational amplifier having an inverting input and a non-inverting input, and a negative resistance circuit connected to the inverting input of the operational amplifier. The negative resistance circuit includes a second operational amplifier, a current source controlled by the second operational amplifier, and a cross-coupled transistor circuit having at least one transistor biased by a current produced by the current source.
ELECTRONICALLY TUNED RF TERMINATION
Systems and methods for a tunable impedance are provided. A tunable impedance includes a transistor assembly having two terminals and a control input. The transistor assembly includes one or more transistors electrically connected between the two terminals to provide a first impedance between the two terminals, based upon a control signal. One or more replica transistors react to the control signal in a similar fashion as the transistor assembly, to provide a replica impedance based upon the control signal. A control circuit is configured to generate the control signal based upon a voltage across the replica transistor(s) and/or a current through the replica transistor(s).
BANDGAP REFERENCE WITH INPUT AMPLIFIER FOR NOISE REDUCTION
A bandgap reference circuit includes first through fourth bipolar junction transistors (BJTs). The base and collector of the first BJT are shorted together. The second BJT is coupled to the first BJT via a first resistor. The base of the third BJT is coupled to the base of the first BJT. The base and collector of the fourth BJT are coupled together and also are coupled to the base of the second BJT. A second resistor is coupled to the fourth emitter of the fourth BJT. A third resistor is coupled to the second resistor and to the emitter of the second BJT. An operational amplifier has a first input coupled to the first resistor and the collector of the second BJT, a second input coupled to the emitter of the third BJT and the collector of the fourth BJT, and an output coupled to the collectors of the first and third BJTs.
Load-adaptive power amplifier
Certain aspects of the present disclosure provide an amplification system. The amplification system generally includes: a first amplifier having an output coupled to an output of the amplification system; a second amplifier, inputs of the first amplifier and the second amplifier being coupled to an input of the amplification system; an impedance coupled to an output of the second amplifier; and a biasing circuit having a first voltage sense input coupled to the output of the first amplifier, a second voltage sense input coupled to the output of the second amplifier, and an output coupled to a bias input of the first amplifier.