A reconfigurable power detector is described. The reconfigurable power detector includes a first power detector circuit. The first power detector circuit includes a pair of coupled first-type transistors to switch a first-type positive output and a first-type negative output. The reconfigurable power detector includes a second power detector circuit. The second power detector circuit includes a pair of coupled second-type transistors to switch a second-type positive output and a second-type negative output. The reconfigurable power detector includes a switch matrix. The switch matrix includes switches to select the second-type positive output and the second-type negative output in a first configuration, the first-type positive output and the first-type negative output in a second configuration, and the first-type positive output and the second-type positive output in a third configuration. The reconfigurable power detector also includes a configuration block to program the switches to select an output configuration at a detector output.

Methods and apparatus for providing amplifier protection for a radio frequency (RF) front-end circuit. An example RF front-end circuit generally includes an amplifier with a gain, a first sensor configured to sense a first power (or voltage) of a first node coupled to an input of the amplifier, a second sensor configured to sense a second power (or voltage) of a second node coupled to an output of the amplifier, and logic coupled to the first and second sensors. The logic is generally configured to determine that the second power (or voltage) is outside a range based on the gain and the first power (or voltage) and to take an action to protect the amplifier based on the determination. By utilizing the techniques and apparatus described herein, protection can be provided to the amplifier(s) in an RF front-end circuit without significantly impacting the performance of the RF front-end circuit.

Methods and architectures for closed loop digital pre-distortion (DPD) in a multi-stream phased array communication system include sampling outputs, from transmit antennas or dedicated analog detectors, of a plurality of RF power amplifiers operating in transmission of multi-stream transmission, correcting or normalizing the detected outputs, summing the outputs into a combined DPD feedback signal and selecting pre-distortion vectors to be used in altering the output of the PAs.

Bias networks for amplifiers are disclosed. An example bias network includes an adaptive bias circuit, configured to generate a bias signal for an amplifier, and further includes a coupling circuit, configured to couple the adaptive bias circuit to the amplifier. The coupling circuit is made adaptive in that its' impedance depends on a power level of an input signal to be amplified by the amplifier. By configuring the coupling circuit to have a variable impedance that depends on the power level of the input signal, the coupling circuit may adapt to the input power level and, thereby, may modify the bias signal to reduce/optimize at least some of the nonlinearity that may be introduced to the bias signal by the adaptive bias circuit.

Bias networks for amplifiers are disclosed. An example bias network includes an adaptive bias circuit, configured to generate a bias signal for an amplifier, and further includes a coupling circuit, configured to couple the adaptive bias circuit to the amplifier. The coupling circuit is made adaptive in that its' impedance depends on a power level of an input signal to be amplified by the amplifier. By configuring the coupling circuit to have a variable impedance that depends on the power level of the input signal, the coupling circuit may adapt to the input power level and, thereby, may modify the bias signal to reduce/optimize at least some of the nonlinearity that may be introduced to the bias signal by the adaptive bias circuit.

In one aspect, a power amplifier apparatus comprising a power amplifier (PA) and an adaptive controller is provided. The PA comprises at least one transistor and the adaptive controller is configured to control a bias voltage of the transistor based on a measured power efficiency of the PA and a measure output signal quality of the PA. In another aspect, a method of optimizing PA performance is provided. The PA comprises at least one transistor and the method includes initializing a bias voltage of the transistor, receiving measurements indicating a power efficiency and an output signal quality of the PA, evaluating the received measurements, calculating a new bias voltage for the transistor based on the evaluation, and applying the calculated new bias voltage to the transistor.

Disclosed is a method for producing a stage for amplifying the power of a variable envelope signal including at least one amplifier. For each amplifier, a form of ideal variation in average power POUT.sub.L is selected. For each value of each setting parameter and for each average input power value, a value of an optimisation criterion is calculated on the basis of the mathematical expectation of at least one optimisation parameter. An optimum value of each setting parameter is determined and the amplification stage is produced with a number of amplifiers in parallel determined on the basis of an average output power value and with, for each amplifier, matching circuits providing the optimum values of the setting parameters. The invention also relates to an amplification stage produced in this manner.

A device includes an amplifier for amplifying and supplying a high frequency power supplied to a load, a parameter detector for detecting a parameter of a current, a voltage, or a power from the amplifier to the load, a current supply unit for supplying a driving current for the amplifier, and an output unit for outputting a command signal for changing an amplification degree of the amplifier based on the detected parameter such that the parameter becomes a target value. The device further includes a first abnormality detector for detecting an abnormality by monitoring the command signal, and/or a current detector for detecting the driving current, a current data storage unit storing an upper and a lower limit value of the driving current, and a second abnormality detector for detecting the abnormality based on at least one of the upper limit value or the lower limit value.

An output power control device includes: an attenuator to attenuate power of a high-frequency signal output from an oscillator; a high-frequency power amplifier to amplify the power of the high-frequency signal output from the attenuator; a monitor circuit to monitor the power of the high-frequency signal output from the high-frequency power amplifier; and a controller to control an attenuation amount of the attenuator based on the monitor signal output from the monitor circuit or based on attenuation amount setting data from a data unit. The oscillator generates the high-frequency signal in synchronization with a trigger signal. The controller starts control of the attenuation amount of the attenuator based on the attenuation amount setting data, in synchronization with the trigger signal, and, after receiving the monitor signal, the controller controls the attenuation amount of the attenuator based on the monitor signal.

An amplifier arrangement (200) for amplifying input signals and a method for operating the amplifier arrangement are disclosed. The amplifier arrangement (200) comprises a main amplifier circuit (210) having an input and an output; a first (221) and second (222) auxiliary amplifier circuits each having an input and an output, wherein each of the first (221) and second (222) auxiliary amplifier circuits being selectively operable to operate in combination with the main amplifier circuit (210). The amplifier arrangement (200) further comprises a single hybrid coupler circuit (230) having a first port (221) being coupled to the output of the main amplifier circuit (210), a second port (232) being coupled to the output of the first auxiliary amplifier circuit (221), a third port (233) being coupled to the output of the second auxiliary amplifier circuit (222) and a fourth port (234) being coupled to the load (240) of the amplifier (200).