Methods and devices for clamping an output of an amplifier stage of an amplifier are presented. According to one aspect, a clamp sense circuit senses a voltage at a node of an internal stage of the amplifier. The clamp sense circuit senses a region of operation of the clamp circuit and correspondingly controls a current limiter that is introduced in the amplifier to limit a current through the internal stage of the amplifier. Limiting the current in turn causes limiting a current path from a clamp circuit through the output of the amplifier stage. According to another aspect, the clamp sense circuit is a replica of the amplifier stage of the amplifier, the output of the amplifier stage coupled to the clamp circuit, and an output of the replica decoupled from the clamp circuit.

A system includes a reference field effect transistor (FET), wherein the reference FET is a depletion mode transistor, and a bias control circuit. The bias control circuit includes a voltage sensor connected to a drain terminal of the reference FET. The voltage sensor is configured to measure a voltage at the drain terminal of the reference FET as a measured voltage, determine a voltage difference between a reference voltage and the measured voltage, and output the voltage difference at a voltage sensor output terminal. The system includes a translation circuit connected the voltage sensor output terminal. The translation circuit is configured to convert the voltage difference into a negative gate bias voltage, and apply the negative gate bias voltage to a gate terminal of the reference FET.

A capacitive trans-impedance amplifier comprising a voltage amplifier having an inverting input terminal for connection to an input current source. A feed-back capacitor is coupled between the inverting input terminal and the output terminal to accumulate charges received from the input current source and to generate a feed-back voltage accordingly. A calibration unit includes a calibration capacitor electrically coupled, via a calibration switch, to the inverting input terminal and electrically coupled to the feed-back capacitor. The calibration unit is operable to switch the calibration switch to a calibration state permitting a discharge of a quantity of charge from the calibration capacitor to the feed-back capacitor. The capacitive trans-impedance amplifier is arranged to determine a voltage generated across the feed-back capacitor while the calibration switch is in the calibration state and to determine a capacitance value (C=Q/V) for the feed-back capacitor according to the value of the generated voltage (V) and the quantity of charge (Q).

Disclosed is a voltage detector and a communication circuit capable of detecting a low input voltage. The voltage detector includes: an alternating-current coupling circuit generating a first and a second input voltages according to a source input voltage; a feedback amplifier outputting a branch current according to a sink current including the branch current, and determining an output voltage according to the first input voltage and the amount of the branch current; and an auxiliary circuit outputting the amount of the sink current according to the second input voltage. When the sink current increases as the second input voltage rises, the branch current also increases, so that the output voltage not only rises as the first input voltage rises but also rises as the branch current increases. This feature allows a lower input voltage to be detectable by the detection of the risen output voltage.

In certain aspects, a method is provided for measuring power using a resistive element coupled between a power amplifier and an antenna. The method includes squaring a voltage from a first terminal of the resistive element to obtain a first signal, squaring a voltage from a second terminal of the resistive element to obtain a second signal, and generating a measurement signal based on a difference between the first signal and the second signal. In some implementations, the resistive element is implemented with a power switch.

A circuit for driving a capacitive load includes an amplifier for driving the load based on an input signal, the amplifier comprising at least a boost converter, a dynamic model configured to track a capacitance of the load and a voltage of the source for powering at least parts of the circuit, an adaptive filter, configured to filter the input signal based on an output of the dynamic model.

A circuit includes an operational amplifier having: a positive input; a negative input; an operational amplifier output; a differential front end; a positive channel (PCH) input stage; a negative channel (NCH) input stage; and an output stage. The operational amplifier also includes a current limit circuit coupled to an output of the output stage and including: an output current sense voltage circuit having an output configured to provide an output current sense voltage; an indirect current feedback circuit coupled to the output of the output current sense voltage circuit, the indirect current feedback circuit having an output configured to provide an output current feedback sense voltage responsive to the output current sense voltage; and control circuitry coupled to the indirect current feedback circuit and configured vary a resistance between the output stage output and ground responsive to a difference between the output current feedback sense voltage and a reference voltage.

Systems and methods for a tunable impedance are provided. A tunable impedance includes a transistor assembly having two terminals and a control input. The transistor assembly includes one or more transistors electrically connected between the two terminals to provide a first impedance between the two terminals, based upon a control signal. One or more replica transistors react to the control signal in a similar fashion as the transistor assembly, to provide a replica impedance based upon the control signal. A control circuit is configured to generate the control signal based upon a voltage across the replica transistor(s) and/or a current through the replica transistor(s).

An amplifier circuit includes an input terminal to which a radio frequency signal is input, an amplifier transistor that has a control terminal and amplifies the radio frequency signal, a bias circuit that includes an emitter-follower circuit or a source-follower circuit and supplies a bias current to the control terminal of the amplifier transistor, an inductor arranged in series between an emitter of the emitter-follower circuit and the control terminal of the amplifier transistor or between a source of the source-follower circuit and the control terminal of the amplifier transistor, and a variable resistance circuit connected to the inductor.

A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second low-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.