A power amplifier system having a power amplifier with a signal input and a signal output, bias circuitry coupled to the signal input, and a radio frequency (RF) peak detector having an input coupled to the signal output is disclosed. The RF peak detector is configured to generate a peak voltage signal. Temperature-compensated overvoltage protection circuitry coupled between an output of the RF peak detector and a control input of the bias circuitry is configured to respond to the peak voltage signal crossing over a predetermined peak voltage threshold and to provide an overvoltage protection control signal to cause the bias circuitry to adjust biasing for the power amplifier to reduce an overvoltage condition at the RF peak detector input.

Amplifier systems for driving a wide range of loads are provided herein. In certain embodiments, an amplifier system includes a voltage output amplifier and a current output amplifier that are electrically coupled in parallel with one another between an input terminal and an output terminal. The amplifier system further includes a control circuit operable to control whether or not the voltage output amplifier and/or current output amplifier drive the output terminal.

Devices and methods for generating a bias voltage for a transceiver operating in time division multiplexing operation, and corresponding transceivers are provided. In this case, the bias voltage is controlled in guard intervals between transmission and reception of signals by the transceiver.

A clamp circuit can control a clamp transistor such that a change in a photodiode current detection voltage signal in an optical receiver circuit can control the clamp transistor to change state when a difference of a clamp voltage and the photodiode current detection voltage signal exceeds a threshold voltage of the clamp transistor. Using a feedback loop, the clamp circuit can accurately clamp a current when the photodiode current is larger than a detect current threshold.

Disclosed in the present invention are a radio frequency power amplifier based on power detection feedback, a chip, and a communication terminal. The radio frequency power amplifier comprises multiple stages of amplifier circuits and at least one power detection feedback circuit; the input end of the power detection feedback circuit is connected to the output end of a current stage of amplifier circuit, and the output end of the power detection feedback circuit is connected to the input ends of the current stage of amplifier circuit and at least one stage of amplifier circuit located prior to the current stage of amplifier circuit. The power detection feedback circuit generates, according to the detected output power of the current stage of amplifier circuit, a control voltage varying inversely with the output power, so that the power detection feedback circuit outputs current varying positively with the control voltage.

A stress sensor is provided, including a substrate and a bridge circuit disposed thereon. The bridge circuit is coupled between an output node and a ground node. The bridge circuit includes a first branch and a second branch, the first having a first resistor, R1, having a first orientation and coupled to a tuning resistor, Rtune, at a first intermediate node. The second branch includes a second resistor, R2, having a second orientation that is different from the first orientation, and coupled to a variable resistor, Rvar, at a second intermediate node. The bridge circuit includes an amplifier having a positive input terminal coupled to the second intermediate node, and a negative input terminal coupled to the first intermediate node. The amplifier generates a voltage output at the output node as a function of mechanical stress applied to the substrate. Rvar is non-linearly tunable based on the voltage output.

Disclosed in the present invention are a radio frequency power amplifier based on current detection feedback and a chip. The radio frequency power amplifier comprises multiple stages of amplifier circuits and at least one current detection feedback circuit; the input end of the current detection feedback circuit is connected to the input end of a current stage of amplifier circuit among the multiple stages of amplifier circuits by means of a corresponding resistor, and the output end of the current detection feedback circuit is connected to the input end of at least one stage of amplifier circuit prior to the current stage of amplifier circuit. The current detection feedback circuit generates, according to the detected quiescent operating current of the current stage of amplifier circuit, a control voltage varying inversely with the quiescent operating current, so that the current detection feedback circuit outputs current varying positively with the control voltage.

An audio amplifier has a first H bridge and a second H bridge, to drive a speaker as a load. The second H bridge drives the speaker through resistors for increased output impedance. Control logic operates the first H bridge as a class D amplifier for larger amplitudes of audio signal, and operates the second H bridge as a class D amplifier for smaller amplitudes of audio signal. Other aspects are also described and claimed.

A signal process circuit includes a signal modulation unit, a first resistor, a second resistor, a first discharge unit, a second discharge unit and a discharge detection unit. The signal modulation unit is used to modulate an input signal for generating a modulated signal. The first resistor is coupled between the signal modulation unit and an operation node. The second resistor is coupled between the operation node and the signal modulation unit. The first discharge unit is coupled to the signal modulation unit. The discharge unit is coupled to the signal modulation unit. The discharge detection unit is coupled to the first discharge unit, the operation node and the second discharge unit for detecting an output common voltage and control a discharge path accordingly.

Thermally-sensitive structures and methods for sensing the temperature in a region of a FET during device operation are described. The region may be at or near a region of highest temperature achieved in the FET. Metal resistance thermometry (MRT) can be implemented with gate or source structures to evaluate the temperature of the FET.