An electronic circuit includes an input matching network, a tunable resonator, a fixed output matching network and a transistor. The tunable resonator includes a varactor and an inductor connected in series. The output matching network includes at least one shunt open-stub connected to the output of the inductor in the tunable resonator and at least one transmission line connected to the at least one shunt open-stub. The transistor includes a gate connected to the input matching network, a source connected to ground, and a drain directly connected to an input of the tunable resonator.

According to one embodiment, a low noise amplifier (LNA) circuit includes a first stage which includes: a first transistor; a second transistor coupled to the first transistor; a first inductor coupled in between an input port and a gate of the first transistor; and a second inductor coupled to a source of the first transistor, where the first inductor and the second inductor resonates with a gate capacitance of the first transistor for a dual-resonance. The LNA circuit includes a second stage including a third transistor; a fourth transistor coupled between the third transistor and an output port; and a passive network coupled to a gate of the third transistor. The LNA circuit includes a capacitor coupled in between the first and the second stages, where the capacitor transforms an impedance of the passive network to an optimal load for the first amplifier stage.

The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.

Power amplifiers and related methods are disclosed having configurable switched mode operation in a high-power mode of operation and a low-power mode of operation. The power amplifiers have a first cascode amplifier coupled to receive a positive differential input and a second cascode amplifier coupled to receive a negative differential input. The first and second cascode amplifiers include output stages and first/second input stages. The first input stages and the second input stages are enabled in a high-power mode of operation. The first input stages are disabled and the second input stages are enabled during a low-power mode of operation. For further embodiments, a switchable clamp operates in the low-power mode to clamp a voltage output for the second input stages. For further embodiments, the output stages are provided a variable voltage bias or are coupled to tunable capacitances that are varied between the low-power and high-power modes.

An amplifier for a receiver circuit is disclosed. The amplifier has an input node (V.sub.in) and an output node (V.sub.out). It comprises a tunable tank circuit connected to the output node (V.sub.out), a feedback circuit path connected between the output node (V.sub.out) and the input node (V.sub.in), and a tunable capacitor connected between an internal node of the feedback circuit path and a reference-voltage node. A receiver circuit and a communication apparatus is disclosed as well.

A circuit includes an amplifier to amplify an input signal and generate an output signal. The circuit also includes a tuning network to tune frequency response of the amplifier. The tuning network includes at least one tunable capacitor, which includes at least one micro-electro mechanical system (MEMS) capacitor. The amplifier could include a first die, the at least one MEMS capacitor could include a second die, and the first die and the second die could be integrated in a single package. The at least one MEMS capacitor could include a MEMS superstructure over a control structure, which is to control the MEMS superstructure and tune the capacitance of the at least one MEMS capacitor.

A Doherty amplifier circuit having a tunable impedance and phase (TIP) circuit to provide an adjustable alpha factor, which allows for a selection of power added efficiency (PAE) curves that are useful for applications having different modulations or to meet other criteria. Embodiments include a Doherty amplifier having a TIP circuit that provides for tunability of the impedance Z.sub.INV (resulting in an adjustable alpha factor) while maintaining the phase of the output of the carrier amplifier at 90 (for a selected polarity)a low phase variation. Embodiments of the TIP circuit include one or more series-connected TIP cells comprising at least one TIP circuit combined with a tunable phase adjustment circuit. In operation, when the impedance of a TIP cell is adjusted, adjustments within the cell are also made to provide a phase shift correction back towards 90 (at the selected polarity).

A tunable filter is described where the frequency response as well as bandwidth and transmission loss characteristics can be dynamically altered, providing improved performance for transceiver front-end tuning applications. The rate of roll-off of the frequency response can be adjusted to improve performance when used in duplexer applications. The tunable filter topology is applicable for both transmit and receive circuits. A method is described where the filter characteristics are adjusted to account for and compensate for the frequency response of the antenna used in a communication system.

In a case where the power of a signal to be amplified is greater than or equal to a threshold value, a signal distributor (2) outputs one of signals to a carrier amplifier (6), outputs another signal, a phase of which is 90 degrees behind that of the one of the signals, to a peak amplifier (8), and adjusts a phase shift amount of a signal shifted by a phase shifter (7) depending on the frequency of the signal to be amplified. In a case where the power of the signal to be amplified is less than the threshold value, the signal distributor (2) outputs the one of the signals to the carrier amplifier (6) without outputting the other signal to the peak amplifier (8).

The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.