H03F2200/61

Mismatch detection using replica circuit

An apparatus for detecting difference in operating characteristics of a main circuit by using a replica circuit is presented. In one exemplary case, a sensed difference in operating characteristics of the two circuits is used to drive a tuning control loop to minimize the sensed difference. In another exemplary case, several replica circuits of the main circuit are used, where each is isolated from one or more operating variables that affect the operating characteristic of the main circuit. Each replica circuit can be used for sensing a different operating characteristic, or, two replica circuits can be combined to sense a same operating characteristic.

Amplifier
10771023 · 2020-09-08 · ·

An amplifier including a signal input terminal, at least one signal output terminal, a first and a second cascode amplifier circuits, a capacitor and a loading circuit. The signal input terminal receives an input signal. The first cascode amplifier circuit includes a first and a second input terminals and a first and a second output terminals. The first input terminal coupled to the signal input terminal receives the input signal. The second cascode amplifier circuit includes a third and a fourth input terminals and a third output terminal. The third input terminal is coupled to the first output terminal, and the third output terminal is coupled to the second input terminal. Two terminals of the capacitor are coupled to the fourth input terminal and the first output terminal respectively. A terminal of the loading circuit is coupled to the third output terminal, and another terminal of the loading circuit is coupled to the second output terminal. At least one of two terminals of the loading circuit is further coupled to the at least one signal output terminal.

Cascode amplifier bias circuits

Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.

Integrated RF front end with stacked transistor switch
10715200 · 2020-07-14 · ·

A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal. A preferred embodiment of the RF transceiver IC includes two distinct PA circuits, two distinct receive signal amplifier circuits, and a four-way antenna switch to selectably couple a single antenna connection to any one of the four circuits.

Low-noise amplifier supporting beam-forming function and receiver including the same

A low-noise amplifier in a receiver supporting a beam forming function may selectively change a phase shift for beam steering. The low-noise amplifier may include first and second transistors and a variable capacitance circuit connected to a gate of the second transistor. The variable capacitance circuit may selectively change capacitance thereof based on a capacitance control signal applied thereto according to beam-forming information, where the changed capacitance correspondingly causes a phase change in an output signal of the low-noise amplifier. A similar scheme may be employed for amplifiers in transmit signal paths to steer a transmit beam.

LOW NOISE AMPLIFIER AND SEMICONDUCTOR DEVICE
20200220503 · 2020-07-09 ·

A low noise amplifier has a first transistor that amplifies a high frequency input signal, a second transistor that further amplifies the amplified signal to generate an output signal, a first inductor connected between the source of the first transistor and a first reference potential node, a third transistor that is connected between the source of the first transistor and the first inductor, a first capacitor and a first resistor connected in series between a drain of the second transistor and an output node of the low noise amplifier, a second resistor and a third resistor connected in series between a gate of the third transistor and a second reference potential node, and a charge pump circuit that sets a potential of a connection node between the second resistor and the third resistor to a potential lower than a potential of the first reference potential node in the second mode.

Optimized multi gain LNA enabling low current and high linearity including highly linear active bypass
10673401 · 2020-06-02 · ·

An LNA having a plurality of paths, each of which can be controlled independently to achieve a gain mode. Each path includes at least an input FET and an output FET coupled in series. A gate of the output FET is controlled to set the gain of the LNA. Signals to be amplified are applied to the gate of the input FET. Additional stacked FETs are provided in series between the input FET and the output FET.

Source Switched Split LNA
20200144967 · 2020-05-07 ·

A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a common source configured input FET and a common gate configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors and gate to ground caps for each legs can be used to further improve the matching performance of the invention.

SWITCHLESS MULTI INPUT STACKED TRANSISTOR AMPLIFIER TREE STRUCTURE
20200127617 · 2020-04-23 ·

Methods and devices for amplifying a plurality of input RF signals based on a multi-input cascode configuration is described. Transistors of stages of the multi-input cascode configuration are connected according to a tree, where there is at least one cascode transistor that is connected to at least two transistors of a stage below. In one case the stage below is an input stage, and in another case the stage below is a cascode stage. Activation and deactivation of transistors of the stages provide different conduction paths between the input stage and an output stage.

Device Stack with Novel Gate Capacitor Topology
20200112290 · 2020-04-09 ·

Systems, methods and apparatus for practical realization of an integrated circuit comprising a stack of transistors operating as an RF amplifier are described. As stack height is increased, capacitance values of gate capacitors used to provide a desired distribution of an RF voltage at the output of the amplifier across the stack may decrease to values approaching parasitic/stray capacitance values present in the integrated circuit which may render the practical realization of the integrated circuit difficult. Coupling of an RF gate voltage at the gate of one transistor of the stack to a gate of a different transistor of the stack can allow for an increase in the capacitance value of the gate capacitor of the different transistor for obtaining an RF voltage at the gate of the different transistor according to the desired distribution.