H03F2200/66

CONTROL SYSTEM FOR A POWER AMPLIFIER
20170230021 · 2017-08-10 · ·

An apparatus for controlling the gain and phase of an input signal input to a power amplifier comprises a gain control loop configured to control the gain of the input signal based on power levels of the input signal and an amplified signal output by the power amplifier, to obtain a predetermined gain of the amplified signal, and a phase control loop configured to obtain an error signal related to a phase difference between a first signal derived from the input and a second signal derived from the amplified signal, and control the phase based on the error signal, to obtain a predetermined phase of the amplified signal. The phase control loop delays the first signal such that the delayed first signal and the second signal used to obtain the error signal correspond to the same part of the input signal. The apparatus may be included in a satellite.

Sound signal processing device, sound system, and computer-implemented method
12225361 · 2025-02-11 · ·

A sound signal processing device supplies an output sound signal to an amplification device configured to supply a first sound signal to a high-frequency speaker and a low-frequency speaker. The sound signal processing device includes a high-pass filter, an amplitude limitation circuit, a low-pass filter, and a synthesis circuit. The high-pass filter removes a low-frequency component from an input sound signal to generate a high-frequency sound signal. The amplitude limitation circuit limits an amplitude of the input sound signal at or below a reference value to generate a second sound signal. The reference value corresponds to a clipping voltage of the amplification device. The low-pass filter removes a high-frequency component from the second sound signal to generate a low-frequency sound signal. The synthesis circuit synthesizes the high-frequency sound signal and the low-frequency sound signal to generate the output sound signal.

INDUCTIVE DISTORTION SYSTEM AND METHOD
20170132996 · 2017-05-11 ·

A distortion device includes a transconductance stage, a current amplifier stage electrically coupled to the transconductance stage, and a transformer portion electrically coupled to the current amplifier stage. The transconductance stage includes a first capacitor to provide a ground to a resistor, and voltage across the resistor develops a current through a second capacitor to the current amplifier stage. The current amplifier stage includes a positive half cycle and a negative half cycle. The positive half cycle and the negative half cycle amplify the current from the transconductance stage and supply the amplified current to a primary winding of a transformer in the transformer portion, and the output of the transformer portion includes a low-level signal.

Control system for a power amplifier
09634631 · 2017-04-25 · ·

An apparatus for controlling the gain and phase of an input signal input to a power amplifier comprises a gain control loop configured to control the gain of the input signal based on power levels of the input signal and an amplified signal output by the power amplifier, to obtain a predetermined gain of the amplified signal, and a phase control loop configured to obtain an error signal related to a phase difference between a first signal derived from the input and a second signal derived from the amplified signal, and control the phase based on the error signal, to obtain a predetermined phase of the amplified signal. The phase control loop delays the first signal, such that the delayed first signal and the second signal used to obtain the error signal correspond to the same part of the input signal. The apparatus may be included in a satellite.

Sense amplifier

A sense amplifier measures a state of a memory cell coupled to a sense node. The sense amplifier receives a control signal to enable the sense amplifier. The sense amplifier generates a voltage based on an amplifier current that is based on a sense current flowing through the sense node. The sense amplifier generates a feedback current based on the voltage to compensate variations of the sense current. The sense amplifier receives a reference control signal to enable a reference circuit to generate a reference current. The sense amplifier provides an output based on a result of comparing the sense current with the reference current, the output representing the state of the memory cell.

A method and device for limiting power to protect power supply from overload in a multichannel audio amplifier
20250373217 · 2025-12-04 ·

A method for use in an audio system including a plurality of amplifier channels of corresponding audio channels. Each of the amplifier channels receives a respective input audio signal and is powered by a same power supply. The method comprises: obtaining a value of an indicator, wherein the indicator is representative of an energy reserve of the power supply; for each of the amplifier channels, determining a gain to be applied by an attenuation function to the respective input audio signal and a clipping level to be applied by a clipping function to the output of the attenuation function; wherein the gain decreases over time when the value of the indicator is below a threshold and the gain increases over time up to a maximum value when the value of the indicator is above the threshold, wherein the threshold is representative of a nominal energy level at which the power supply is in nominal operation; wherein the clipping level is determined as a monotonic function of the value the indicator.

DIGITAL POWER AMPLIFIER WITH ANALOG CLIPPING SCHEME
20260088777 · 2026-03-26 ·

Described are techniques for analog clipping for a switched capacitor power amplifier comprising an array of a plurality of unit cells shareable between in-phase (I) and quadrature-phase (Q) signal components. A pair of control bits is associated with each unit cell, comprising a first control bit to selectively enabling the unit cell to use the I component, and a second control bit to selectively enabling the unit cell to use the Q component. A truth table is configured for a first subset and a second subset of unit cells, and causes the unit cells of the first subset to be driven by the I component in response to a double-enabled condition of the respective pair of control bits. The truth table is configured to cause the unit cells of the second subset to be driven by the Q component in response to the double-enabled condition.