A wide voltage trans-impedance amplifier includes a first P-channel metal oxide semiconductor (PMOS) transistor PM1, a second PMOS transistor PM2, a third PMOS transistor PM3, a fourth PMOS transistor PM4, a fifth PMOS transistor PM5, a first bias voltage VB1, a second bias voltage VB2, a third bias voltage VB3, a first N-channel metal oxide semiconductor (NMOS) transistor NM1, and a second NMOS transistor NM2. A common-gate amplifier detects a change of an input voltage, and a negative feedback is constructed by injecting a current into a current mirror to achieve a low input impedance. The trans-impedance amplifier uses a common-gate amplifier to monitor an input voltage and uses a current mirror to perform the transconductance enhancement on an input transistor, while ensuring a relatively high loop gain.

Processes and systems for producing glass fibers having regions devoid of glass using submerged combustion melters, including feeding a vitrifiable feed material into a feed inlet of a melting zone of a melter vessel, and heating the vitrifiable material with at least one burner directing combustion products of an oxidant and a first fuel into the melting zone under a level of the molten material in the zone. One or more of the burners is configured to impart heat and turbulence to the molten material, producing a turbulent molten material comprising a plurality of bubbles suspended in the molten material, the bubbles comprising at least some of the combustion products, and optionally other gas species introduced by the burners. The molten material and bubbles are drawn through a bushing fluidly connected to a forehearth to produce a glass fiber comprising a plurality of interior regions substantially devoid of glass.

A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.

A room-temperature semiconductor maser, including a first matching network, a second matching network, a heterojunction-containing transistor, and a resonant network. The output end of the first matching network is connected to the drain of the heterojunction-containing transistor. The input end of the second matching network is connected to the source of the heterojunction-containing transistor. The gate of the heterojunction-containing transistor is connected to the resonant network. The pumped microwaves are fed into the input end of the first matching network.

An amplifier includes a P-type transistor and an N-type transistor that are connected in series, an operation amplifier, a transformer, and a variable attenuator. In the operation amplifier, an output terminal is coupled to a gate side of one of the P-type transistor and the N-type transistor, one of an inverting input terminal and a non-inverting input terminal is coupled to drain sides of both of the P-type transistor and the N-type transistor, and a reference voltage is to be applied to the other of the inverting input terminal and the non-inverting input terminal. In the transformer, a primary coil is coupled to a source side of one of the P-type transistor and the N-type transistor. The variable attenuator is provided between a secondary coil and gate terminals of both of the N-type transistor and the P-type transistor.

A system may include a front end differential amplifier having two input terminals, two input resistors, each of the two input resistors coupled to a respective one of the two input terminals, and an input common mode biasing circuit for an output stage of the front end differential amplifier, the input common mode biasing circuit comprising two current sources configured to generate currents for biasing the output stage of the front end differential amplifier.

Bidirectional variable gain amplifiers (VGAs) for radio frequency (RF) communication systems are provided. In certain embodiments, a bidirectional VGA includes a first amplifier having an input coupled to a transmit/receive port, a second amplifier having an output coupled to a transmit port, a third amplifier having an input coupled to a receive port, a fourth amplifier having an output coupled to the transmit/receive port and to the input of the first amplifier, and a switch circuit that connects an output of the first amplifier to an input of the second amplifier in a transmit mode, and that connects an output of the third amplifier to an input of the fourth amplifier in a receive mode.

The present disclosure relates to semiconductor structures and, more particularly, to unitary Cascode cells with resistance and capacitance optimization, and methods of manufacture. The structure includes a common source FET (CS-FET) in a first portion of a single common semiconductor region, the CS-FET comprising a source region and a drain region, a common gate FET (CG-FET) in a second portion of the single common semiconductor region, the CG-FET comprising a source region and a drain region, and a doped connecting region of the single common semiconductor region, connecting the drain of the CS-FET and the source of the CG-FET.

The present disclosure relates to semiconductor structures and, more particularly, to unitary Cascode cells with resistance and capacitance optimization, and methods of manufacture. The structure includes a common source FET (CS-FET) in a first portion of a single common semiconductor region, the CS-FET comprising a source region and a drain region, a common gate FET (CG-FET) in a second portion of the single common semiconductor region, the CG-FET comprising a source region and a drain region, and a doped connecting region of the single common semiconductor region, connecting the drain of the CS-FET and the source of the CG-FET.

An amplifier includes a first coil coupled to at least one input node. The amplifier further includes second and third coils. A first terminal of the second coil is coupled to a source terminal of a first transistor, while a second terminal of the second coil is coupled to a source terminal of a second transistor. A third coil includes first and second terminals coupled to gate terminals of the first and second transistors, respectively. Responsive to receiving an input signal, the first coil electromagnetically conveys the signal to the second and third coils.