Patent classifications
H03F2200/78
Integrated circuit with an input multiplexer system
An integrated circuit includes a multiplexer circuit configured to provide an output signal on a conductive line, a programmable gain amplifier having a non-inverting input connected to the conductive line to receive the output signal from the multiplexer, a slew rate adjust circuit connected at a first node on the conductive line between the multiplexer circuit and the programmable gain amplifier, a first switch including a first terminal connected to the first node and a second terminal connected to the input of the programmable gain amplifier, and a low pass filter connected between the first and second terminals of the first switch.
PWM driving circuit and method
In an embodiment, a method for shaping a PWM signal includes: receiving an input PWM signal; generating an output PWM signal based on the input PWM signal by: when the input PWM signal transitions with a first edge of the input PWM signal, transitioning the output PWM signal with a first edge of the output PWM signal; and when the input PWM signal transitions with a second edge before the first edge of the output PWM signal transitions, delaying a second edge of the output PWM signal based on the first edge of the output PWM signal.
AUDIO CIRCUIT, ELECTRONIC DEVICE AND VEHICLE AUDIO SYSTEM WITH THE AUDIO CIRCUIT
The present disclosure provides an audio circuit capable of inhibiting a current when mute is deactivated. An output terminal of a class D amplifier circuit is connected to an electroacoustic conversion element through a low-pass filter. An output node of a bridge circuit is connected to the output terminal. An integrator integrates and outputs, in a non-mute period in which a mute control signal is negated, a difference between an input signal and a feedback signal corresponding to an output signal generated at the output terminal, and outputs a predetermined bias voltage in a mute period in which the mute control signal is asserted. A PWM comparator compares the output of the integrator with a periodic voltage. A driver switches, in the non-mute period, the bridge circuit according to an output of the PWM comparator, and fixes an output of the bridge circuit in the mute period.
Temperature compensation circuit for power amplifier
A temperature compensation circuit for a power amplifier is provided, wherein data of circuit configurations corresponding to specific temperatures (including data associated with an output terminal voltage, a bias voltage, an adaptive bias, and a matching impedance of the power amplifier) for the power amplifier is stored in a read-only memory. Therefore, the temperature compensation circuit is capable of reading the data according to a temperature sensing signal to adjust the circuit configuration of the power amplifier accordingly, thereby, in a case of a constant input power of the power amplifier, an output power variance of the power amplifier is within a second interval (e.g., −10%˜+10%) when an environment temperature varies within a first interval. Therefore, the power amplifier has a stable gain.
SEMICONDUCTOR INTEGRATED CIRCUIT, RECEIVING DEVICE, AND DC OFFSET CANCELLATION METHOD
According to one embodiment, a semiconductor device includes an equalizer for receiving a first signal and outputting a second signal that has been adjusted to compensate for attenuation of the first signal. A filter is connected to the output terminal of the equalizer. A cancellation circuit operates to cancel a DC offset in the output of the equalizer. A processing circuit is configured to control the cancellation circuit to cancel the DC offset according to an output from the filter. The processing circuit sets a time constant for the filter to a first value to permit the cancellation circuit to cancel the DC offset when the equalizer is in a first state, and then sets the time constant to a second value when the equalizer is set to a second state to permit the cancellation circuit to cancel the DC offset when the equalizer is in the second state.
DRIVER CIRCUIT ARRANGEMENT FOR DRIVING LOAD AND DIFFERENTIAL DRIVE ARRANGEMENT THEREOF
A driver circuit arrangement for driving a load and a differential drive arrangement thereof are provided. The driver circuit arrangement employs a dual feedback configuration with a feedback resistor and a current sensor feedback arrangement. The current sensor feedback arrangement provides a current feedback path from the amplifier output to the amplifier input, and has a current sensor resistor connected in an output current path of the driver circuit arrangement. A current feedback amplifier is present connected to the current sensor resistor and to the amplifier input.
Dynamically controlled auto-ranging current sense circuit
Embodiments relate to sensing a current provided by a power supply circuit. The current sensing circuit includes a sense transistor for sensing the current provided by a main transistor, a driver for controlling a bias provided to the sense transistor and the main transistor, and a sense resistor for converting the sensed current to a voltage value. Moreover, the current sensing circuit includes a controller that modifies at least one of: (a) a resistance of the main transistor by adjusting the bias voltage provided by the driver, (b) a gain ratio between a load current and a sensing current by adjusting a number of individual devices that are active in the sense transistor, and (c) a resistance of the sense resistor.
Lower-skew receiver circuit with RF immunity for controller area network (CAN)
A circuit (e.g., implemented as part of a controller area network (CAN) bus receiver includes a pre-amplifier stage having first and second outputs. The circuit also includes a comparator having first and second inputs. The first input is coupled to the first output of the pre-amplifier stage, and the second input is coupled to the second output of the pre-amplifier stage. The comparator includes an input differential transistor pair, a second pair of transistors coupled to the input differential transistor pair in a cascode configuration, and a push-pull output stage coupled to the second pair of transistors.
CIRCUIT EMPLOYING MOSFETS AND CORRESPONDING METHOD
A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.
Amplifier with a compensator with a network of at least third order
An amplifier comprising a gain stage with a feedback network comprising two ports between which at least three capacitors are connected in series and between each pair of capacitors a resistor is connected to a predetermined voltage. The gain stage is provided in a feedback loop over a primary amplifier.