In an embodiment an integration circuit has a first input terminal configured to receive a first input signal, a second input terminal configured to receive a second input signal, an output terminal to provide an output signal as a function of the first and the second input signal, a first and a second amplifier, each being switchably connected between the first or the second input terminal and the output terminal, and a capacitor which is switchably coupled in a feedback loop either of the first or of the second amplifier such that the capacitor and one of the first and the second amplifier form an inverting integrator providing the output signal. Therein the integration circuit is prepared to be operated in a first and a second subphase, wherein in each of first and second subphases one of the first and the second input signals is supplied to the inverting integrator and the respective other one of first and the second input signals is supplied to the respective other one of the first and the second amplifier.

A positive high voltage, a first terminal of a semiconductor element, and a first terminal of a first resistance element are connected to a first terminal of a first current controller. A current input terminal of a first active element is connected to a second terminal of the first current controller, and a second terminal of the semiconductor element and a second terminal of the first resistance element are connected to a control terminal of the first active element. A second resistance element is connected between a current output terminal and a control terminal of the first active element. The first current controller allows a drive current corresponding to an input signal to flow in the first active element and allows the drive current output from the first active element to flow into a load, thereby generating an output voltage.

An apparatus for amplifying an input signal is provided. The apparatus includes an output stage to generate an output signal. The apparatus further includes a compensation signal generator configured to generate a compensation signal based on at least one of a voltage value of the input signal or a voltage value of the output signal. The apparatus further includes a combiner configured to generate a control signal for the output stage based on a target signal, the compensation signal and a signal related to a current value of the output stage. The target signal corresponds to a desired output signal. The output stage is configured to generate the output signal using the control signal.

An electronic circuit is provided. The electronic circuit includes a first current generating circuit configured to output a first operating current based on a first operating voltage; and an input circuit configured to: receive a first current corresponding to a first input voltage and a second current corresponding to a second input voltage, wherein the first current and the second current are based on the first operating current; receive a third current and a fourth current that are generated based on the first operating voltage; and generate a fifth current corresponding to the second input voltage based on a second operating current. The electronic circuit is configured to generate an output voltage that is associated with a difference between the first input voltage and the second input voltage based on the second current, the fourth current and the fifth current, and the fourth current corresponds to the third current.

A voltage-current conversion circuit includes a voltage-current conversion resistor connected to an input terminal, and a current mirror circuit which mirrors a current supplied from the voltage-current conversion resistor, wherein the current mirror circuit is constructed to include a depletion-type transistor whose source voltage is biased to be higher than the substrate voltage.

A chopper-stabilized current feedback amplifier includes an input buffer having a non-inverting input and an inverting input. A first group of chopper circuits modulate current at the non-inverting and inverting inputs. The current feedback amplifier further includes a plurality of current mirrors coupled to the input buffer. A second group of chopper circuits modulate current in the current mirrors. The current feedback amplifier also includes phase detector circuitry coupled to the current mirrors and configured to detect a transition current in the current mirrors. The current feedback amplifier also includes a switched capacitor filter having an input coupled to the current mirrors. The switched capacitor filter is turned OFF responsive to the detection of the transition current by the phase detector circuitry. The current feedback amplifier also includes an output stage having an input coupled to the switched capacitor filter and is configured to produce an output signal.

An electronic device may include a sensing circuit and a current subtraction circuit. The sensing circuit may output first and second current signals. The current subtraction circuit may mirror the first and second current signals onto first and second current branches. The second current branch may be split into a first sub-path and a second sub-path. An amplifier may control the amount of current flowing through the second sub-path by forcing the current flowing through the first current branch and the current flowing through the first sub-path to be identical. Configured in this way, the current flowing through the second sub-path will be equal to the difference between the first and second current signals. The current flowing through the second sub-path may be optionally amplified using another current mirror.

A differential current conveyor circuit includes two or more single-ended current conveyor stages and a common bias stage. First and second switches are set between the control terminals of the transistors in the common bias stage and a respective one of a first and a second coupling line of the single ended stages can be switched between the following: a reset state of the circuit with the transistors in the common bias stage coupled to the first and second coupling lines with the single-ended stages set to a bias condition; and a sensing state of the circuit with the transistors in the common bias stage decoupled from the first and second coupling lines, with the single-ended stages in a high impedance state with the control terminals of the input transistors of the single ended stages capacitively coupled to the input terminal.

A first transistor and a second transistor have control terminals coupled to each other. A current mirror circuit supplies a current having the same amount as that of a current I.sub.ref flowing through a first path including the second transistor to a second path including the first transistor and supplies a current having a predetermined number of times m of a current amount of the current I.sub.ref of the first path to a third path separate from the second path. The third transistor and a fourth transistor are provided on the third path. The third transistor has a source coupled to one end of the first transistor, and the fourth transistor has a gate coupled to a gate of the third transistor. A resistor is provided between a source of the fourth transistor and one end of the second transistor.

An oscillator subsystem included in a phase-locked loop circuit of a computer system may include coarse and fine-tuning circuits. The coarse-tuning circuit may generate a coarse-tuning current based on a reference voltage, and the fine-tuning circuit may generate a fine-tuning current by combining respective currents generated by first and second complement current mirror circuits using a voltage level of a control signal. An oscillator circuit may generate a clock signal whose frequency is based on a combination of the coarse and fine-tuning circuits.