A signal booster is disclosed. The signal booster can include a first gain unit with a first adjustable gain configured to be applied to a first-direction signal. The signal booster can include a second gain unit with a second adjustable gain configured to be applied to a second-direction signal. The signal booster can include a signal splitter communicatively coupled to the first gain unit and the second gain unit. The signal booster can include a control unit communicatively coupled to first gain unit and the second gain unit. The control unit can be configured to control the first adjustable gain and the second adjustable gain to compensate for a signal loss of the signal splitter.

A power amplifier circuit for broadband data communication over a path in a communication network can reduce or avoid gain compression, provide low distortion amplification performance, and can accommodate a wider input signal amplitude range. A dynamic variable bias current circuit can be coupled to a common emitter bias node of a differential pair of transistors to provide a dynamic variable bias current thereto as a function of an input signal amplitude of an input signal. Bias current is increased when input signal amplitude exceeds a threshold voltage established by an offset or level-shifting circuit. The frequency response of the bias current circuit can track the frequency content of the input signal. A delay in the signal path to the differential pair can phase-align the bias current to the amplification by the differential pair. A dynamic variable supply voltage can be based on an envelope of the input signal.

The present disclosure relates to a power amplifier (PA) system provided in a semiconductor device and having feed forward gain control. The PA system comprises a transmit path and control circuitry. The transmit path is configured to amplify an input radio frequency (RF) signal and comprises a first tank circuit and a PA stage. The control circuitry is configured to detect a power level associated with the input RF signal and control a first bias signal provided to the PA stage based on a first function of the power level and control a quality factor (Q) of the first tank circuit based on a second function of the power level.

A transistor circuit includes a transistor having a gate terminal and first and second conduction terminals, a first circuit configured to convert an AC input signal of the transistor circuit to a gate bias voltage and to apply the gate bias voltage to the gate terminal of the transistor, a second circuit configured to convert the AC input signal of the transistor circuit to a control voltage, and a switching circuit configured to apply a first voltage to the first conduction terminal of the transistor in response to the control voltage.

A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacitive (LC) resonant circuit to reduce the effects of gate capacitances of the first cascode transistor pair and the second cascode transistor pair. In some embodiments, the current-mode power amplifier may include a bias current controller. The bias current controller may adjust transistor bias currents based, at least in part, on an input signal received by the current-mode power amplifier.

A signal booster is disclosed that includes a first front-end booster, a second front-end booster, a signal combiner device and a main booster. The first front-end booster can include a first signal power level detector and a first gain unit. The second front-end booster can include a second signal power level detector and a second gain unit. The main booster can include a third signal power level detector and a third gain unit. The main booster can further include a fourth signal power level detector and a fourth gain unit. The first front-end booster can further include a fifth signal power level detector and a fifth gain unit. The second front-end booster can further include a sixth signal power level detector and a sixth gain unit.

A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacitive (LC) resonant circuit to reduce the effects of gate capacitances of the first cascode transistor pair and the second cascode transistor pair. In some embodiments, the current-mode power amplifier may include a bias current controller. The bias current controller may adjust transistor bias currents based, at least in part, on an input signal received by the current-mode power amplifier.

An audio power amplifier arrangement includes an audio power amplification integrated circuit having two loudspeaker outputs. A rectifier circuit includes a first diode having a cathode connected to one of the two loudspeaker outputs and an anode connected to a rectifier output node. A second diode has an anode connected to the one loudspeaker output. A first resistor has a first end connected to a cathode of the second diode and a second end connected to the rectifier output node. A capacitor has a first end connected to the rectifier output node and a second end connected to electrical ground. A second resistor has a first end connected to the rectifier output node and a second end connected to electrical ground.