Patent classifications
H03F2203/45
High dynamic range sensing front-end for neural signal recording systems
A high dynamic range sensing front-end for bio-signal recording systems in accordance with embodiments of the invention are disclosed. In one embodiment, a bio-signal amplifier includes an input signal, where the input signal is modulated to a predetermined chopping frequency, a first amplifier stage, a parallel-RC circuit connected to the first amplifier stage and configured to generate a parallel-RC circuit output by selectively blocking an offset current, a second amplifier stage connected to the parallel-RC circuit that includes a second input configured to receive the parallel-RC circuit output and generate a second output that is an amplified version of the input signal with ripple-rejection. Further, the bio-signal amplifier can also include an auxiliary path configured for boosting input impedance by pre-charging at least one input capacitor. In addition, the bio-signal amplifier can also include a DC-servo feedback loop that includes an integrator that utilizes a duty-cycled resistor.
CIRCUIT EMPLOYING MOSFETS AND CORRESPONDING METHOD
A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.
Degenerated transimpedance amplifier with wire-bonded photodiode for reducing group delay distortion
An integrated circuit includes a degeneration network configured to improve group delay across one or more variations, wherein the degeneration network includes a transimpedance amplifier with one or more degeneration inductors. The transimpedance amplifier further includes one or more transistors, and the one or more degeneration inductors are connected after at least one emitter of the one or more transistors.
Method for biasing outputs of a folded cascode stage in a comparator and corresponding comparator
A comparator includes a folded cascode stage having positive and negative outputs. The folded cascode stage includes: a common-mode voltage regulation circuit that includes resistive elements that are respectively situated between each of the outputs and a common-mode node. A compensation circuit is configured to regulate a difference between the voltages on the outputs, and is configured to generate a constant and continuous compensation current in the two resistive elements. A hysteresis circuit is configured to offset voltages on the outputs, and to generate a hysteresis current in the two resistive elements.
Method for Biasing Outputs of a Folded Cascode Stage in a Comparator and Corresponding Comparator
A comparator includes a folded cascode stage having positive and negative outputs. The folded cascode stage includes: a common-mode voltage regulation circuit that includes resistive elements that are respectively situated between each of the outputs and a common-mode node. A compensation circuit is configured to regulate a difference between the voltages on the outputs, and is configured to generate a constant and continuous compensation current in the two resistive elements. A hysteresis circuit is configured to offset voltages on the outputs, and to generate a hysteresis current in the two resistive elements.
APPARATUS FOR DETECTING NEURAL SPIKE
An apparatus for detecting a neural spike includes: a preprocessing circuit configured to remove a low-frequency component from a neural signal to form a low-frequency component removed neural signal, and amplify the low-frequency component removed neural signal; a comparing circuit configured to compare an output signal of the preprocessing circuit to a threshold signal; a merging circuit configured to merge spikes within a reference interval of an output signal of the comparing circuit into one peak, and to generate, based on the merging of the spikes, an output signal comprising pulses; and a counting circuit configured to count the pulses.
Amplifier circuit and filter
An OTA circuit includes a first input stage that includes a first pair of transistors having sources coupled to a reference potential and converts a differential input voltage input to gates of the first pair of transistors into a first control current, a second input stage that includes a second pair of transistors having sources coupled to the reference potential and converts the differential input voltage input to gates of the second pair of transistors into a second control current, a first output circuit that generates one output current out of the differential output currents in accordance with the first control current, and a second output circuit that generates the other output current out of the differential output currents in accordance with the second control current.
Voltage regulators
A low-dropout voltage regulator (2) comprises: a differential amplifier portion (4) including a first amplifier input connected to a reference voltage (16), a second amplifier input, and a differential output which is determined by a difference between the reference voltage and a voltage on the second amplifier input; an output portion (10) arranged to provide a regulator output voltage (62) which is controlled by the differential output of the amplifier portion, the second amplifier input being connected to or derived from (70) the regulator output voltage; and a biasing portion (8) arranged to measure an external load current and to provide a biasing current to the differential amplifier portion which depends on the load current.
Systems and methods for a switchless radio front end
A radio circuit, comprises an antenna; a differential power amplifier, comprising differential transmit inputs and differential transmit outputs, configured to amplify differential transmit signals received via the differential transmit inputs and output the amplified differential transmit signals via the differential transmit outputs; a differential low noise amplifier, comprising differential receive inputs and differential receive outputs, configured to receive differential receive signals via the differential receive inputs and output amplified differential receive signals via the differential receive outputs; and a transformer comprising a primary winding and a secondary winding, the primary winding coupled with the differential transmit outputs of the power amplifier and the differential receive inputs of the low noise amplifier and the secondary winding coupled with the antenna.
HIGH PERFORMANCE FOLDED CASCODE CURRENT SOURCE WITH DUAL MIRRORS CURRENT FEEDBACK
Systems and methods for providing a high performance current source are described. In an example implementation, the current source includes transistors in dual current mirror configuration. The dual mirror configuration employs current feedback to increase the output resistance of the current source while achieving a wide voltage swing.