Patent classifications
H03G1/0005
Attenuating an input signal
Apparatus (301) for switchable attenuation of a differential input signal from a microphone includes positive and negative non-attenuating paths (406, 410) have n- and p-type MOSFETs (421, 422, 423, 424) in back-to-back configurations; positive and negative attenuating paths (405, 409) have n- and p-type MOSFETs (415, 416, 418, 419) in back-to-back configurations in combination with resistors; a gate driver (425) applies a drive signal of one polarity (QNEG) to gates of the n-type MOSFETs in the attenuating paths and the p-type MOSFETs in the non-attenuating paths, and a drive signal of opposite polarity (QPOS) to the gates of the p-type MOSFETs in the attenuating paths and the n-type MOSFETs in the non-attenuating paths; and the state of the MOSFETs depends on the drive signals at their gates, and thus the input signal may be routed via either the non-attenuating paths or the attenuating paths by controlling the drive signals.
Variable gain power amplifiers
A variable-gain power amplifying technique includes generating, with a network of one or more reactive components included in an oscillator, a first oscillating signal, and outputting, via one or more taps included in the network of the reactive components, a second oscillating signal. The second oscillating signal has a magnitude that is proportional to and less than the first oscillating signal. The power amplifying technique further includes selecting one of the first and second oscillating signals to use for generating a power-amplified output signal, and amplifying the selected one of the first and second oscillating signals to generate the power-amplified output signal.
ADJUSTABLE LOW-PASS FILTER IN A COMPACT LOW-POWER RECEIVER
According to one embodiment, a compact low-power receiver comprises first and second analog circuits connected by a digitally controlled interface circuit. The first analog circuit has a first direct-current (DC) offset and a first common mode voltage at an output, and the second analog circuit has a second DC offset and a second common mode voltage at an input. The digitally controlled interface circuit connects the output to the input, and is configured to match the first and second DC offsets and to match the first and second common mode voltages. In one embodiment, the first analog circuit is a variable gain control transimpedance amplifier (TIA) implemented using a current mode buffer, the second analog circuit is a second-order adjustable low-pass filter, whereby a three-pole adjustable low-pass filter in the compact low-power receiver is effectively produced.
Radio frequency adaptive voltage shaping power amplifier systems and methods
Systems and method for improving operation of a radio frequency system are provided. One embodiment includes instructions to execute a coarse calibration to associate a first output power with a first operational parameter set; instruct the radio frequency system to transmit a signal based at least in part on the first operational parameter set and a base detrough function; determine performance metrics resulting from transmission of the signal; determine changes in the performance metrics resulting from operating the radio frequency based at least in part on the first operational parameter set and each of a plurality of augmented detrough functions; and associate a second operational parameter set with a second output power, in which the second operational parameter set includes one of the plurality of augmented detrough functions selected based at least in part on the changes that reduce margin between the performance metrics and performance metric thresholds.
Method for stabilizing the gain of a discrete-state automatic gain control circuit
An automatic gain controller comprises an amplifier including a variable gain. A resonant low-pass filter includes an input coupled to an output of the amplifier. The resonant low-pass filter is a second order low-pass filter. The second order low-pass filter includes a Sallen-Key topology. The Sallen-Key topology comprises a quality factor between 1.4 and 1.6. A threshold detection circuit includes an input coupled to an output of the second order low-pass filter to compare an output signal of the second order low-pass filter to a threshold and an output of the threshold detection circuit coupled to control the variable gain of the amplifier. A state machine is coupled between the output of the threshold detection circuit and the amplifier. The state machine is configured to transition based on a current state of the state machine. The resonant low-pass filter exhibits overshoot to trigger a hysteresis of the threshold detection circuit.
Control system for a power amplifier
An apparatus for controlling the gain and phase of an input signal input to a power amplifier comprises a gain control loop configured to control the gain of the input signal based on power levels of the input signal and an amplified signal output by the power amplifier, to obtain a predetermined gain of the amplified signal, and a phase control loop configured to obtain an error signal related to a phase difference between a first signal derived from the input and a second signal derived from the amplified signal, and control the phase based on the error signal, to obtain a predetermined phase of the amplified signal. The phase control loop delays the first signal, such that the delayed first signal and the second signal used to obtain the error signal correspond to the same part of the input signal. The apparatus may be included in a satellite.
Dynamic current source for zero-crossing amplifier units for use in high-speed communication circuits
A zero-crossing amplifier unit for use in high speed analog-digital-converters. A gain stage compares a sampling voltage at an input node with a provided threshold voltage to obtain a gain stage output signal. A voltage controlled current source provides a load current depending on a time window between an initial slope and an end slope of the gain stage output signal. A slope control means increases a duration of a rise and/or fall time of at least one of the initial and end slopes of the gain stage output signal.
Signal processing apparatus and method, program, and data recording medium
The present invention relates to a signal processing apparatus and method, a program, and a data recording medium configured such that the playback level of an audio signal can be easily and effectively enhanced without requiring prior analysis. An analyzer 21 generates mapping control information in the form of the root mean square of samples in a given segment of a supplied audio signal. A mapping processor 22 takes a nonlinear function determined by the mapping control information taken as a mapping function, and conducts amplitude conversion on a supplied audio signal using the mapping function. In this way, by conducting amplitude conversion of an audio signal using a nonlinear function that changes according to the characteristics in respective segments of an audio signal, the playback level of an audio signal can be easily and effectively enhanced without requiring prior analysis. The present invention may be applied to portable playback apparatus.
Active Device Which Has A High Breakdown Voltage, Is Memory-Less, Traps Even Harmonic Signals And Circuits Used Therewith
An active device and circuits utilized therewith are disclosed. In an aspect, the active device comprises an n-type transistor having a drain, gate and bulk and a p-type transistor having a drain, gate and bulk. Then-type transistor and the p-type transistor include a common source. The device includes a first capacitor coupled between the gate of the n-type transistor and the gate of the p-type transistor, a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor and a third capacitor coupled between the bulk of the n-type transistor and the bulk of p-type transistor. The active device has a high breakdown voltage, is memory less and traps even harmonic signals.
Active Device Which Has A High Breakdown Voltage, Is Memory-Less, Traps Even Harmonic Signals And Circuits Used Therewith
An active device and circuits utilized therewith are disclosed. In an aspect, the active device comprises an n-type transistor having a drain, gate and bulk and a p-type transistor having a drain, gate and bulk. The n-type transistor and the p-type transistor include a common source. The device includes a first capacitor coupled between the gate of the n-type transistor and the gate of the p-type transistor, a second capacitor coupled between the drain of the n-type transistor and the drain of p-type transistor and a third capacitor coupled between the bulk of the n-type transistor and the bulk of p-type transistor. The active device has a high breakdown voltage, is memory less and traps even harmonic signals.