A variable gain amplifier (VGA) is provided. The VGA includes at least one amplifier circuit, at least one current-steering circuit and at least one bias voltage circuit. Each current-steering circuit is coupled to its corresponding amplifier circuit. Each bias voltage circuit is coupled to its corresponding current-steering circuit to provide a positive bias voltage to each current-steering circuit.

An amplitude detector has a phase shifter such as one using an analog differentiator and an adjustable gain stage, or one using a determinable delay, the phase shifter coupled to shift phase of an input signal to the amplitude detection apparatus. The detector also has a first analog multiplier coupled to square the input signal, a second analog multiplier coupled to square output of the phase shifter; and an analog adder coupled to sum outputs of the first and second analog multiplier. An automatic gain control circuit has the amplitude detector coupled to control gain of a controllable amplifier.

Apparatus and methods for envelope tracking systems with automatic mode selection are provided herein. In certain configurations, a power amplifier system includes a power amplifier configured to provide amplification to a radio frequency signal and to receive power from a power amplifier supply voltage, and an envelope tracker including a signal bandwidth detection circuit configured to generate a detected bandwidth signal based on processing an envelope signal corresponding to an envelope of the radio frequency signal. The envelope tracker further includes a switch bank configured to receive a plurality of regulated voltages, a filter configured to filter an output of the switch bank to generate the power amplifier supply voltage, and a mode control circuit configured to control a filtering characteristic of the filter based on the detected bandwidth signal.

A digital radio-frequency (RF) circuitry is disclosed. In one aspect, the circuitry includes a digitally controlled amplifier configured to receive an RF input signal and a digital control signal, and to output an amplitude controlled output signal. The digitally controlled amplifier includes one or more common-source amplifying unit cells. A respective common-source amplifying unit cell includes a sources node connected to a switching circuitry controllable by the digital control signal so as to activate or deactivate the common-source amplifying unit cell. The switching circuitry comprises a first switch configured to connect the source node with a first power supply node and a second switch configured to connect the source node with a second power supply node when activating and deactivating, respectively, the common-source amplifying unit cell.

A system to control convergence of a loop to a reference value. A device, under control of the control loop, generates an output signal. A comparator compares the output signal to a reference value. Responsive to the output signal being less than the reference value, outputting an up signal and, responsive to the output signal being greater than the reference value, outputting a down signal. A counter is configured to maintain a counter value which is incremented in response to an up signal and decremented in response to a down signal. The counter outputs a gain control value. An up/down signal tracker is configured to track a pattern of up signals and down signals and compare the tracked pattern to one or more predetermined patterns such that, responsive to the up signals and down signals matching one of the one or more predetermined patterns, the counter size is decreased.

Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths to provide variable gain for individual amplifier inputs. The variable gain for an individual input is provided using an amplification stage that is common for each input of the amplifier. A variable attenuation is provided for individual inputs through a combination of a band selection switch and an attenuation selection branch. Individual inputs can be configured to bypass the variable attenuation in a high gain mode.

Disclosed herein are methods for use in operating signal amplifiers that provide impedance adjustments for different gain modes. The impedance adjustments are configured to result in a constant real impedance for an input signal at the amplifier. Some of the disclosed methods adjust impedance using switchable inductors to compensate for changes in impedance with changing gain modes. Some of the disclosed methods adjust a device size to compensate for changes in impedance with changing gain modes. By providing impedance adjustments, the amplifiers reduce losses and improve performance by improving impedance matching over a range of gain modes.

A system to control convergence of a loop to a reference value. A device, under control of the control loop, generates an output signal. A comparator compares the output signal to a reference value. Responsive to the output signal being less than the reference value, outputting an up signal and, responsive to the output signal being greater than the reference value, outputting a down signal. A counter is configured to maintain a counter value which is incremented in response to an up signal and decremented in response to a down signal. The counter outputs a gain control value. An up/down signal tracker is configured to track a pattern of up signals and down signals and compare the tracked pattern to one or more predetermined patterns such that, responsive to the up signals and down signals matching one of the one or more predetermined patterns, the counter size is decreased.

Disclosed herein are methods for amplifying a signals. The methods include receiving signals at a plurality of input nodes. The methods also include configuring a gain stage to be in a selected one of a plurality of gain settings, at least some of the gain settings resulting in different impedances presented to the signal. The methods also include adjusting the resistance presented to the signal by the gain stage for the selected gain setting, the adjusted resistance being configured to provide a targeted constant value of the impedance at the input across the plurality of gain settings. The methods also include amplifying at least a portion of the received signals. Adjusting the resistance compensates for changes to the input impedance to improve return loss and mismatch over gain modes.

A digitally controlled variable gain amplifier (VGA) for generating amplification output levels is disclosed. In one aspect, the digitally controlled VGA includes a positive amplification stage including at least two positive amplifiers, and a corresponding negative amplification stage coupled to the positive amplification stage. The negative amplification stage includes at least two negative amplifiers. The positive amplification stage and the corresponding negative amplification stage are digitally controlled by one or more digital codes. The corresponding negative amplification stage is coupled in parallel with the positive amplification stage and is equally weighted as the positive amplification stage, and both the positive amplification stage and the corresponding negative amplification stage selectively contribute to the generation of the amplification output levels for the digitally controlled VGA.