An amplifying device includes a first amplifier, a voltage-limiting circuit, a second amplifier, a first controller, and a second controller. The first amplifier is configured to amplify an input signal. The voltage-limiting circuit is configured to limit a voltage of an output signal from the first amplifier to within a limit range. The second amplifier is configured to amplify an output signal from the voltage-limiting circuit. The first controller is configured to control the limit range in accordance with a current supplied to a load from the second amplifier. The second controller is configured to decrease an amplification factor of the first amplifier in a state in which the voltage-limiting circuit limits the voltage of the output signal from the first amplifier.

An active limiting system that is suitable to protect a low noise amplifier against the high power signals received from a signal input includes, at least one first switch, source of which is connected to a gate voltage; at least first resistor which is connected between the gate and source of the first switch; at least one second resistor, which is connected between a drain voltage and drain of the first switch; at least one second switch, source of which is connected to said drain voltage and drain of which is connected to a signal input; at least one third resistor which is connected between the drain of the first switch and gate of the second switch; at least one first filtering element, which blocks DC currents/voltages and which is connected between the source of the second switch and ground.

An active limiting system that is suitable to protect a low noise amplifier against the high power signals received from a signal input includes, at least one first switch, source of which is connected to a gate voltage; at least first resistor which is connected between the gate and source of the first switch; at least one second resistor, which is connected between a drain voltage and drain of the first switch; at least one second switch, source of which is connected to said drain voltage and drain of which is connected to a signal input; at least one third resistor which is connected between the drain of the first switch and gate of the second switch; at least one first filtering element, which blocks DC currents/voltages and which is connected between the source of the second switch and ground.

An amplifier includes an amplifier circuit and a gain adjusting circuit. The amplifier circuit has a design gain and a real gain and is configured to output an output signal according to an input signal and the real gain. The gain adjusting circuit is coupled to the amplifier circuit and is configured to receive the input signal to compare a voltage of the input signal with a first reference voltage, wherein when the voltage of the input signal exceeds the first reference voltage, the gain adjusting circuit increases the real gain of the amplifier circuit, so that the real gain approach the design gain.

A signal processing apparatus includes a level adjuster adjusting a level of an input signal, and a setter calculating an electric charge estimate value being a value obtained by estimating an electric charge amount of a charging and discharging element based on the charging and discharging element to which a predetermined electric charge is supplied and in which the electric charge is held and the electric charge supplied to the charging and discharging element and setting an adjustment coefficient of the level adjuster based on the electric charge estimate value.

A signal processing apparatus includes a level adjuster adjusting a level of an input signal, and a setter calculating an electric charge estimate value being a value obtained by estimating an electric charge amount of a charging and discharging element based on the charging and discharging element to which a predetermined electric charge is supplied and in which the electric charge is held and the electric charge supplied to the charging and discharging element and setting an adjustment coefficient of the level adjuster based on the electric charge estimate value.

A sound signal processing apparatus includes: first amplifier which amplifies a sound signal, depending on an input level of the sound signal; and second amplifier which amplifies with a gain the sound signal amplified by first amplifier. Second amplifier automatically decreases the gain when a level of the sound signal is greater than an upper limit threshold, and second amplifier automatically increases the gain when the level of the sound signal is lower than the upper limit threshold and when the gain is lower than a predetermined value. When second amplifier increases the gain, second amplifier changes the gain at a first speed when a user has performed an operation to decrease the input level, and second amplifier changes the gain at a second speed lower than the first speed when the user has not performed the operation to decrease the input level.

A sound signal processing apparatus includes: first amplifier which amplifies a sound signal, depending on an input level of the sound signal; and second amplifier which amplifies with a gain the sound signal amplified by first amplifier. Second amplifier automatically decreases the gain when a level of the sound signal is greater than an upper limit threshold, and second amplifier automatically increases the gain when the level of the sound signal is lower than the upper limit threshold and when the gain is lower than a predetermined value. When second amplifier increases the gain, second amplifier changes the gain at a first speed when a user has performed an operation to decrease the input level, and second amplifier changes the gain at a second speed lower than the first speed when the user has not performed the operation to decrease the input level.

A two-stage high-power RF limiter circuit for an RF signal receiver incorporates a heavy limiting stage to limit high energy pulses of a received RF signal to a desired power threshold over a sustained time period, while a light limiting stage reacts quickly to high energy pulses to reduce spike leakage associated with the slower reaction time of the heavy limiting stage. Both heavy and light limiting stages incorporate PIN diodes biased to a voltage just below the desired power threshold (the light limiter biased to a slightly higher voltage than the heavy limiter) so the PIN diodes do not activate until power levels are high enough to warrant limiting. The holdoff voltage across the PIN diodes is maintained by Zener diodes biased to a voltage corresponding to the power threshold, allowing the PIN diodes to self-bias once the power threshold is reached.

A two-stage high-power RF limiter circuit for an RF signal receiver incorporates a heavy limiting stage to limit high energy pulses of a received RF signal to a desired power threshold over a sustained time period, while a light limiting stage reacts quickly to high energy pulses to reduce spike leakage associated with the slower reaction time of the heavy limiting stage. Both heavy and light limiting stages incorporate PIN diodes biased to a voltage just below the desired power threshold (the light limiter biased to a slightly higher voltage than the heavy limiter) so the PIN diodes do not activate until power levels are high enough to warrant limiting. The holdoff voltage across the PIN diodes is maintained by Zener diodes biased to a voltage corresponding to the power threshold, allowing the PIN diodes to self-bias once the power threshold is reached.